AD5382BSTZ-5 Analog Devices Inc, AD5382BSTZ-5 Datasheet - Page 31

IC DAC 14BIT 32CH 5V 100-LQFP

AD5382BSTZ-5

Manufacturer Part Number
AD5382BSTZ-5
Description
IC DAC 14BIT 32CH 5V 100-LQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD5382BSTZ-5

Data Interface
Serial, Parallel
Design Resources
32 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5382 (CN0011) AD5382 Channel Monitor Function (CN0012)
Settling Time
8µs
Number Of Bits
14
Number Of Converters
32
Voltage Supply Source
Single Supply
Power Dissipation (max)
65mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Resolution (bits)
14bit
Sampling Rate
125kSPS
Input Channel Type
Parallel, Serial
Supply Voltage Range - Analogue
4.5V To 5.5V
Supply Voltage Range -
RoHS Compliant
Number Of Channels
32
Resolution
14b
Conversion Rate
125KSPS
Single Supply Voltage (typ)
5V
Dual Supply Voltage (typ)
Not RequiredV
Architecture
Resistor-String
Power Supply Type
Analog and Digital
Power Supply Requirement
Analog and Digital
Output Type
Voltage
Integral Nonlinearity Error
±4+/- LSB
Single Supply Voltage (min)
4.5V
Single Supply Voltage (max)
5.5V
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD5382EB - BOARD EVAL FOR AD5382
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD5382BSTZ-5
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD5382BSTZ-5
Manufacturer:
ADI/亚德诺
Quantity:
20 000
MICROPROCESSOR INTERFACING
Parallel Interface
The AD5382 can be interfaced to a variety of 16-bit microcon-
trollers or DSP processors. Figure 35 shows the AD5382 family
interfaced to a generic 16-bit microcontroller/DSP processor.
The lower address lines from the processor are connected to
A0–A4 on the AD5382. The upper address lines are decoded
to provide a CS , LDAC signal for the AD5382. The fast interface
timing of the AD5382 allows direct interface to a wide variety
of microcontrollers and DSPs, as shown in
AD5382 to MC68HC11
The serial peripheral interface (SPI) on the MC68HC11 is
configured for master mode (MSTR = 1), Clock Polarity bit
(CPOL) = 0, and the Clock Phase bit (CPHA) = 1. The SPI is
configured by writing to the SPI control register (SPCR)—see
the 68HC11 User Manual. SCK of the 68HC11 drives the
SCLK of the AD5382, the MOSI output drives the serial data
line (DIN) of the AD5382, and the MISO input is driven from
DOUT. The SYNC signal is derived from a port line (PC7).
1
ADDITIONAL PINS OMITTED FOR CLARITY.
DSP PROCESSOR
μCONTROLLER/
UPPER BITS OF
ADDRESS BUS
DATA
BUS
Figure 35
R/W
D15
D0
A4
A3
A2
A1
A0
1
.
Figure 35. AD5382-to-Parallel Interface
Rev. B | Page 31 of 40
ADDRESS
DECODE
When data is being transmitted to the AD5382, the SYNC line
is taken low (PC7). Data appearing on the MOSI output is valid
on the falling edge of SCK. Serial data from the 68HC11 is
transmitted in 8-bit bytes with only eight falling clock edges
occurring in the transmit cycle.
1
ADDITIONAL PINS OMITTED FOR CLARITY.
MC68HC11
REG1
REG0
D13
D0
CS
LDAC
A4
A3
A2
A1
A0
WR
MISO
MOSI
1
SCK
PC7
Figure 34. AD5382-to-MC68HC11 Interface
AD5382
1
DVDD
SER/PAR
RESET
SDO
DIN
SCLK
SYNC
SPI/I
AD5382
2
C
AD5382
1

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