TX43D57VC0CAA HITACHI, TX43D57VC0CAA Datasheet - Page 12

• Manufacturer Part Number: TX43D57VC0CAA
• Manufacturer: HITACHI

Specifications of TX43D57VC0CAA

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Hitachi Displays, Ltd. Date Feb. 23, 2009
BLOCK DIAGRAM OF INTERFACE
Notes 1) RSVD (reserved) pins on a transmitter should be connected with Vss.
Host
Graphics
Controller
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
GA0~GA7
GB0~GB7
RA0~RA7
BA0~BA7
RB0~RB7
BB0~BB7
2) The system must have a LVDS transmitter to drive a module.
3) The impedance of LVDS cable should be 50 ohms per a signal line or about 100 ohms per
RA0~7, RB0~7 : R data
GA0~7, GB0~7 : G data
BA0~7, BB0~7 : B data
DTMG
DTMG
a twist-pair line when it is used differentially.
1)
1)
System (PC) side
TAIN
TBIN
: Display timing data
PLL
PLL
ODD pixel
EVEN pixel
Sh.
No.
RCLKAIN+
RCLKAIN-
RCLKBIN+
RCLKBIN-
RAIN0+
RAIN0-
RAIN1+
RAIN1-
RAIN2+
RAIN2-
RAIN3+
RAIN3-
RBIN0+
RBIN0-
RBIN1+
RBIN1-
RBIN2+
RBIN2-
RBIN3+
RBIN3-
CN1
CN2
3284PS 2609 – TX43D57VC0CAA-2
Receiver: Equivalent of THC63LVDF84B by THine
ODD pixel
EVEN pixel
LVDS
LVDS
TFT module side
PLL
PLL
RAOUT
RBOUT
RA0~RA7
GA0~GA7
BA0~BA7
DTMG
RB0~RB7
GB0~GB7
BB0~BB7
(Reserved)
(Reserved)
(Reserved)
LCD Panel
Controller
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