NP8P128A13BSM60E Micron Technology Inc, NP8P128A13BSM60E Datasheet - Page 44

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NP8P128A13BSM60E

Manufacturer Part Number
NP8P128A13BSM60E
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of NP8P128A13BSM60E

Lead Free Status / Rohs Status
Supplier Unconfirmed
Table 20: Instruction set
12.4.1
Figure 9:
Datasheet
44
Instruction
FAST_READ
WREN
WRSR
WRDI
RDSR
READ
RDID
SE
PP
Write enable (WREN) instruction sequence
Write enable (WREN)
The write enable (WREN) instruction sets the write enable latch (WEL) bit.
The write enable latch (WEL) bit must be set prior to every page program (PP), sector
erase (SE), or write status register (WRSR) instruction.
The write enable (WREN) instruction is entered by driving Chip Select (S) Low, sending
the instruction code, and then driving Chip Select (S) High.
Page program (Bit-alterable write)
Read data bytes at higher speed
Page program (Legacy Program)
S
C
DQ0
DQ1
Page program (On all 1’s)
Read status register
Write status register
Read identification
Read data bytes
Write disable
Description
Write enable
Sector erase
High Impedance
0
1
2
Instruction
3
4
5
One-byte instruction code
6
0000 0110
0000 0100
1001 1111
0000 0101
0000 0001
0000 0011
0000 1011
0000 0010
0010 0010
1101 0001
1101 1000
7
AI13731
D1h
D8h
06h
04h
9Fh
05h
01h
03h
0Bh
02h
22h
Numonyx® Omneo™ P8P Datasheet
Address
bytes
0
0
0
0
0
3
3
3
3
3
3
Dummy
bytes
0
0
0
0
0
0
1
0
0
0
0
August 2010
316144-07
1 to 64
1 to 64
1 to 64
bytes
1 to ∞
1 to ∞
1 to ∞
1 to 3
Data
0
1
0
0

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