AT29C432-12TI Atmel, AT29C432-12TI Datasheet - Page 4
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AT29C432-12TI
Manufacturer Part Number
AT29C432-12TI
Description
Manufacturer
Atmel
Datasheet
1.AT29C432-12TI.pdf
(11 pages)
Specifications of AT29C432-12TI
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
Device Operation (Continued)
Absolute Maximum Ratings*
Concurrent Read While Write
The architecture of the AT29C432 provides concurrent
read while write capability. With other programmable non-
volatile memories internal high voltage operations prevent
the reading of data while a write operation is in process.
However, the AT29C432 is partitioned in a manner to al-
low read operations from the Flash memory array during a
write operation within the E
Conceptually the device was designed assuming the
Flash memory array would be utilized for infrequently up-
dated program storage and the E
would be used for frequently updated data storage. This
simple concept eliminates complicated software and hard-
ware schemes using multiple blocks of memory just to
hold duplicate down-load routines.
Pin Capacitance
Note:
4
Temperature Under Bias................. -55°C to +125°C
Storage Temperature...................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ................... -0.6V to +6.25V
All Output Voltages
with Respect to Ground .............-0.6V to V
Voltage on OE
with Respect to Ground ................... -0.6V to +13.5V
C
C
IN
OUT
1. This parameter is characterized and is not 100% tested.
Parameter
Input Capacitance
Output Capacitance
Memory Arrays
AT29C432
(f = 1 MHz, T = 25°C)
2
PROM memory array.
2
PROM memory array
CC
Typ
4
8
+ 0.6V
(1)
Valid Concurrent Read
Reads from the Flash are allowed throughout the
E
array must be deselected (CEE HIGH).
Reads from the Flash are allowed during t
E
violated. The E
(CEE HIGH).
Invalid Concurrent Reads
Attempts to read the Flash memory array during t
effectively be polling operations.
Attempts to access the Flash memory array while CEE is
low will be ignored. That is, CEE low and CEF low at the
same time is not allowed. Attempts to read the E
memory array while a write to the Flash memory array is
in progress is not allowed.
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
2
2
PROM write cycle time (t
PROM write so long as t
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Max
10
12
2
PROM memory array must be deselected
Units
pF
pF
BLC
WCE
for the E
). The E
2
PROM write is not
2
Conditions
PROM memory
V
V
OUT
IN
= 0V
WPH
= 0V
WCF
2
PROM
o f a
will