SRI4K-A3T/1GE STMicroelectronics, SRI4K-A3T/1GE Datasheet - Page 7

• Manufacturer Part Number: SRI4K-A3T/1GE
• Manufacturer: STMicroelectronics

Specifications of SRI4K-A3T/1GE

• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

Character Transmission Format for Answer
Frame. The character format is the same as for
input data transfer
frames are made up of an SOF, data, a CRC and
an EOF
fer, if an error occurs, the reader does not issue an
error code to the SRI4K, but it should be able to
Figure 9. Answer Start Of Frame
Answer End Of Frame. The EOF shown in
ure 10.
Figure 10. Answer End Of Frame
Transmission Frame
Between the Request data transfer and the An-
swer data transfer, all ASK and BPSK modulations
are suspended for a minimum time of t
This delay allows the reader to switch from Trans-
mission to Reception mode. It is repeated after
each frame. After t
Figure 11. Example of a Complete Transmission Frame
Sent by the
Sent by the
Reader
is composed of:
SRI4K
(Figure
ETU
ETU
11.). As with an input data trans-
SOF
at 106kb/s
12 bits
0
0
b0
b0
0
(Figure
, the 13.56MHz carrier fre-
Cmd
Input data transfer using ASK
10 bits
b1
0
b1
0
5.). The transmitted
Data
10 bits
t
DR
0
0
b2
b2
CRC
10 bits
0
0
b3
b3
0
= 128/ƒ
CRC
10 bits
0
0
b4
b4
Fig-
EOF
10 bits
S
.
0
0
b5
b5
128/fs
t
detect it and manage the situation. The data trans-
fer rate is 106 kbits/second.
Answer Start Of Frame. The SOF described in
Figure 9.
–
–
–
–
quency is modulated by the SRI4K at 847kHz for
a period of t
chronize. After t
ated by the SRI4K forms the start bit (‘0’) of the
Answer SOF. After the falling edge of the Answer
EOF, the reader waits a minimum time, t
sending a new Request Frame to the SRI4K.
0
0
0
b6
b6
f s =847.5kHz
followed by 10 ETUs at logic-0
followed by 2 ETUs at logic-1
followed by 10 ETUs at logic-0,
followed by 2 ETUs at logic-1.
128/fs
Sync
t
1
0
0
b7
b7
Output data transfer using BPSK
is composed of:
SOF
1
12 bits
= 128/ƒ
b8
0
b8
0
1
, the first phase transition gener-
Data CRC CRC
10 bits
0
0
b9
b9
S
10 bits
to allow the reader to syn-
1
1
b10
b10
10 bits
EOF
t
12 bits
b11
1
b11
1
2
AI10882
SOF
ai07665
ai07665
2
, before
SRI4K
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