MT45W256KW16BEGB-708 WT Micron Technology Inc, MT45W256KW16BEGB-708 WT Datasheet - Page 18

• Manufacturer Part Number: MT45W256KW16BEGB-708 WT
• Manufacturer: Micron Technology Inc

Specifications of MT45W256KW16BEGB-708 WT

• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

Configuration Registers
Access Using CRE
Figure 13:
PDF: 09005aef8329f3e3 / Source: 09005aef82e419a5
8mb_4mb_burst_cr1_0_p22z__2.fm - Rev. B 4/ 08 EN
DQ[15:0]
LB#/UB#
A[16:0]
A[17]
ADV#
WE#
OE#
Asynchronous Mode Configuration Register Write Followed by READ ARRAY Operation
CRE
CE#
1
Notes:
Two user-accessible configuration registers define the device operation. The bus config-
uration register (BCR) defines how the CellularRAM interacts with the system memory bus
and is nearly identical to its counterpart on burst mode Flash devices. The refresh configu-
ration register (RCR) is used to control how refresh is performed on the DRAM array.
These registers are automatically loaded with default settings during power-up and can
be updated any time the devices are operating in a standby state.
The configuration registers are loaded either using a synchronous or an asynchronous
WRITE operation when the configuration register enable (CRE) input is HIGH (see
Figure 13 on page 18 and Figure 14 on page 19). When CRE is LOW, a READ or WRITE
operation will access the memory array. The register values are placed on address pins
A[17:0]. In an asynchronous WRITE, the values are latched into the configuration
register on the rising edge of ADV#, CE#, or WE#, whichever occurs first; LB# and UB#
are “Don’t Care.” The BCR is accessed when A[17] is HIGH; the RCR is accessed when
A[17] is LOW. For READs, address inputs other than A17 are “Don’t Care,” and register
bits 15:0 are output on DQ[15:0].
t VPH
1. A[17] = LOW to load RCR; A[17] = HIGH to load BCR.
Select control register
OPCODE
t AVS
t AVS
Initiate control register access
t VP
4Mb: 256K x 16 Async/Page/Burst CellularRAM 1.0 Memory
t AVH
t AVH
t CW
Write address bus value
18
to control register
t WP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CPH
Address
Address
Configuration Registers
Valid data
©2008 Micron Technology, Inc. All rights reserved.
Don’t Care