IDT82V3355TF IDT, Integrated Device Technology Inc, IDT82V3355TF Datasheet - Page 111

IDT82V3355TF

Manufacturer Part Number
IDT82V3355TF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT82V3355TF

Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
64
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant

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SYNC_PHASE_CNFG - Sync Phase Configuration
Programming Information
IDT82V3355
Address:7DH
Type: Read / Write
Default Value: XX000000
7 - 6
5 - 4
3 - 2
1 - 0
Bit
7
-
SYNC_PH3[1:0]
SYNC_PH2[1:0]
SYNC_PH1[1:0]
Name
-
6
-
Reserved.
These bits set the sampling of EX_SYNC3 when EX_SYNC3 is enabled to synchronize the frame sync output signal. Nomi-
nally, the falling edge of EX_SYNC3 is aligned with the rising edge of the T0 selected input clock.
00: On target. (default)
01: 0.5 UI early.
10: 1 UI late.
11: 0.5 UI late.
These bits set the sampling of EX_SYNC2 when EX_SYNC2 is enabled to synchronize the frame sync output signal. Nomi-
nally, the falling edge of EX_SYNC2 is aligned with the rising edge of the T0 selected input clock.
00: On target. (default)
01: 0.5 UI early.
10: 1 UI late.
11: 0.5 UI late.
These bits set the sampling of EX_SYNC1 when EX_SYNC1 is enabled to synchronize the frame sync output signal. Nomi-
nally, the falling edge of EX_SYNC1 is aligned with the rising edge of the T0 selected input clock.
00: On target. (default)
01: 0.5 UI early.
10: 1 UI late.
11: 0.5 UI late.
SYNC_PH31
5
SYNC_PH30
4
111
SYNC_PH21
3
Description
SYNC_PH20
2
SYNCHRONOUS ETHERNET WAN PLL
SYNC_PH11
1
SYNC_PH10
May 19, 2009
0

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