ST72F324BK6TAS STMicroelectronics, ST72F324BK6TAS Datasheet - Page 107

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ST72F324BK6TAS

Manufacturer Part Number
ST72F324BK6TAS
Description
8-BIT MCU
Manufacturer
STMicroelectronics
Datasheet
ST72324B-Auto
Table 55.
Table 56.
SPI Control/Status Register (SPICSR)
SPICSR
1:0 SPR[1:0]
Bit
2
SPIF
RO
7
Name
CPHA
SPICR register description (continued)
SPI master mode SCK frequency
WCOL
Serial clock
Clock Phase
Serial clock frequency
RO
6
f
This bit is set and cleared by software.
0: The first clock transition is the first data capture edge.
1: The second clock transition is the first capture edge.
Note: The slave must have the same CPOL and CPHA settings as the master.
These bits are set and cleared by software. Used with the SPR2 bit, they select
the baud rate of the SPI serial clock SCK output by the SPI in master mode
(seeTable
Note: These 2 bits have no effect in slave mode.
f
f
f
CPU
f
f
CPU
CPU
CPU
CPU
CPU
/128
/16
/32
/64
/4
/8
OVR
56).
RO
5
Doc ID13466 Rev 4
MODF
RO
4
SPR2
Reserved
Function
1
0
0
1
0
0
3
-
SOD
R/W
2
SPR1
Reset value: 0000 0000 (00h)
0
0
0
1
1
1
On-chip peripherals
SSM
R/W
1
SPR0
0
0
1
0
0
1
R/W
SSI
107/198
0

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