ST72F324BK6TAS STMicroelectronics, ST72F324BK6TAS Datasheet - Page 194

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ST72F324BK6TAS

Manufacturer Part Number
ST72F324BK6TAS
Description
8-BIT MCU
Manufacturer
STMicroelectronics
Datasheet
Known limitations
194/198
Table 122. Port A and F configuration
As a consequence, for cycle-accurate operations, these configurations are prohibited in
either input or output mode.
Workaround
To avoid this from occurring, it is recommended to connect one of these pins to GND (PF4
or PF0) or V
PLL
Off
On
PA3
0
0
DD
(PA3 or PF1).
PF4
1
1
PF1
0
0
Doc ID13466 Rev 4
Toggling
PF0
1
Maximum 2 clock cycles lost at each rising or falling
edge of PF0
Maximum 1 clock cycle lost out of every 16
Clock disturbance
ST72324B-Auto

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