SI5338M-A-GMR Silicon Laboratories Inc, SI5338M-A-GMR Datasheet - Page 100

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SI5338M-A-GMR

Manufacturer Part Number
SI5338M-A-GMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheets
Si5338
Reset value = xxxx xxxx
Reset value = xxxx xxxx
100
Register 108.
Register 109.
Name
Name
Type
Type
Bit
Bit
6:0
7:0
Bit
Bit
7
D7
D7
MS0_PHSTEP[7:0]
MS0_PHOFF[14:8]
Reserved
Name
Name
D6
D6
D5
D5
MultiSynth0 Phase Step Size.
The phase step size is MultiSynth0_PHSTEP[13:0]*Tvco/128 where
Tvco is the period of the VCO. Either the phase inc/dec pins (if avail-
able) or register 52[1:0] will control the stepping of phase. A phase
increment will delay the clock edge.
Reserved.
MultiSynth0 Initial Phase Offset.
MultiSynth0_PHOFF[14:0] is a 2s complement number. The initial
phase offset is MultiSynth0_PHOFF[14:0]*Tvco/128 where Tvco is the
period of the VCO.
MS0_PHSTEP[7:0]
D4
D4
Rev. 0.6
MS0_PHOFF[14:8]
R/W
R/W
D3
D3
Function
Function
D2
D2
D1
D1
D0
D0

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