SI5338M-A-GMR Silicon Laboratories Inc, SI5338M-A-GMR Datasheet - Page 6

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SI5338M-A-GMR

Manufacturer Part Number
SI5338M-A-GMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheets
Si5338
Table 5. Performance Characteristics
(V
6
Parameter
PLL Acquisition Time
PLL Lock Range
PLL Loop Bandwidth
MultiSynth Frequency
Synthesis Resolution
CLKIN Loss of Signal Detect
Time
CLKIN Loss of Signal Release
Time
PLL Loss of Lock Detect Time
POR to Output Clock Valid
(Pre-programmed Devices)
Input-to-Output Propagation
Delay
Output-Output Skew
POR to I
Programmable Initial
Phase Offset
Phase Increment/Decrement
Accuracy
Phase Increment/Decrement
Range
Frequency range for phase
increment/decrement
Phase Increment/Decrement
Update Time
Notes:
DD
1. Outputs at integer-related frequencies and using the same driver format. See "3.9.3. Initial Phase Offset" on page 24.
2. The maximum step size is only limited by the register lengths; however, the MultiSynth output frequency must be kept
3. Update rate via I
4. Default value is 0.5% down spread.
5. Default value is ~31.5 kHz.
= 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, T
between 5 MHz and Fvco/8.
2
C Ready
2
C is also limited by the time it takes to perform a write operation.
P
P
Symbol
f
P
t
t
PRANGE
LOSRLS
P
DSKEW
f
t
OFFSET
UPDATE
RANGE
t
t
PROP
LOCK
f
t
t
f
ACQ
RES
LOS
RDY
STEP
LOL
BW
MultiSynth output >18 MHz
Output frequency < Fvco/8
A
Test Condition
Rev. 0.6
Rn divider = 1
(PLL Bypass)
= –40 to 85 °C)
Pin control
Buffer Mode
2,3
1
5000
0.01
Min
–45
–45
667
0
Typ
1.6
2.6
0.2
2.5
0
5
350
Max
100
+45
+45
25
10
15
20
1
5
1
2
2
MHz
Unit
ppm
MHz
ppb
ms
ms
ms
ms
µs
µs
ns
ps
ns
ps
ns
ns

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