MAX5856AECM+D Maxim Integrated Products, MAX5856AECM+D Datasheet - Page 17

• Manufacturer Part Number: MAX5856AECM+D
• Description: IC DAC 8BIT DUAL 300MSPS 48-TQFP
• Manufacturer: Maxim Integrated Products

Specifications of MAX5856AECM+D

• Settling Time: 11ns
• Number Of Bits: 8
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 792mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The MAX5856A features an on-chip PLL clock multipli-
er, which generates all internal, synchronized high-
speed clock signals required by the input data latches,
interpolation filters, and DAC cores. The on-chip PLL
includes a phase detector, VCO, prescalar, and
charge-pump circuits. The PLL can be enabled or dis-
abled through PLLEN. To enable PLL, set PLLEN = 1.
With the PLL enabled (PLLEN = 1) and 4x/2x interpola-
tion enabled, an external low-frequency clock reference
source may be applied to CLK pin. The clock reference
source serves as the input data clock. The on-chip PLL
multiplies the clock reference by a factor of two (2x) or
a factor of four (4x). The input data rate range and CLK
frequency are set by the selected interpolation mode.
In 2x interpolation mode, the data rate range is 75MHz
to 150MHz. In 4x interpolation mode, the data rate
range is 37.5MHz to 75MHz.
Note: When the PLL is enabled, CLK becomes an
input, requiring CLKXP to be pulled low and CLKXN to
be pulled high. To obtain the best phase noise perfor-
mance, disable the PLL function.
With the PLL disabled (PLLEN = 0) and 4x/2x interpola-
tion enabled, an external conversion clock is applied at
CLKXN/CLKXP. The conversion clock at CLKXN/CLKXP
has a frequency range of 0 to 300MHz (see Table 5).
This clock is buffered and distributed by the
MAX5856A to drive the interpolation filters and DAC
cores. In this mode, CLK becomes a divide-by-N (DIV-
N) output at either a divide-by-two or divide-by-four
rate. The DIV-N factor is set by the selected interpola-
Figure 4. Setting IFS with the Internal 1.24V Reference and the Control Amplifier
*COMPENSATION CAPACITOR (C
______________________________________________________________________________________
AGND
Dual 8-Bit, 300Msps DAC with 4x/2x/1x
OPTIONAL EXTERNAL BUFFER
FOR HEAVIER LOADS
PLL Clock Multiplier and
COMP
MAX4040
≈ 100nF)
I
REF
=
V
R
Clocking Modes
REF
SET
AGND
C
COMP
Interpolation Filters and PLL
*
R
SET
REFO
REFR
I
REF
tion mode. The CLK output, at DIV-N rate, must be
used to synchronize data into the MAX5856A data
ports. In this mode, keep the capacitive load at the CLK
output low (10pF or less at f
With the interpolation disabled (1x mode) and the PLL
disabled (PLLEN = 0), the input clock at CLKXN/CLKXP
can be used to directly update the DAC cores. In this
mode, the maximum data rate is 165MHz.
The MAX5856A provides an integrated 50ppm/°C,
1.24V, low-noise bandgap reference that can be dis-
abled and overridden with an external reference volt-
age. REFO serves either as an external reference input
or an integrated reference output. If REN is connected
to AGND, the internal reference is selected and REFO
provides a 1.24V (50µA) output. Buffer REFO with an
external amplifier, when driving a heavy load.
The MAX5856A also employs a control amplifier
designed to simultaneously regulate the full-scale out-
put current (I
Calculate the output current as:
where I
V
R
amplifier output current of the MAX5856A (Figure 4).
This current is mirrored into the current-source array
where I
rent segments and summed to valid output current
readings for the DACs.
REFO/RSET
SET
Internal Reference and Control Amplifier
is the reference resistor that determines the
FS
REF
REFERENCE
REN
BANDGAP
is equally distributed between matched cur-
1.24V
) and I
is the reference output current (I
FS
MAX5856A
) for both outputs of the devices.
FS
AGND
I
FS
is the full-scale output current.
= 32 x I
DAC
REF
= 165MHz).
SOURCE ARRAY
CURRENT-
I
FS
REF
17
=