MAX5856AECM+D Maxim Integrated Products, MAX5856AECM+D Datasheet - Page 21

• Manufacturer Part Number: MAX5856AECM+D
• Description: IC DAC 8BIT DUAL 300MSPS 48-TQFP
• Manufacturer: Maxim Integrated Products

Specifications of MAX5856AECM+D

• Settling Time: 11ns
• Number Of Bits: 8
• Data Interface: Parallel
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 792mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 9 shows the MAX5856A output operating in differ-
ential DC-coupled mode. This configuration can be used
in communication systems employing analog quadrature
upconverters and requiring a baseband sampling, dual-
channel, high-speed DAC for I/Q synthesis. In these
applications, information bandwidth can extend from
10MHz down to several hundred kilohertz. DC-coupling
is desirable in order to eliminate long discharge time
constants that are problematic with large, expensive
coupling capacitors. Analog quadrature upconverters
have a DC common-mode input requirement of typically
0.7V to 1.0V. The MAX5856A differential I/Q outputs can
maintain the desired full-scale signal level at the required
0.7V to 1.0V DC common-mode voltage when powered
from a single 2.85V (±5%) supply. The MAX5856A meets
this low-power requirement with minimal reduction in
dynamic range while eliminating the need for level-shift-
ing resistor networks.
Grounding and power-supply decoupling strongly influ-
ence the MAX5856A performance. Unwanted digital
crosstalk can couple through the input, reference,
power-supply, and ground connections, which can
affect dynamic specifications, like signal-to-noise ratio
or spurious-free dynamic range. In addition, electro-
magnetic interference (EMI) can either couple into or
be generated by the MAX5856A. Observe the ground-
ing and power-supply decoupling guidelines for high-
speed, high-frequency applications. Follow the
power-supply and filter configuration to achieve opti-
mum dynamic performance.
Use of a multilayer printed circuit (PC) board with sepa-
rate ground and power-supply planes is recommend-
ed. Run high-speed signals on lines directly above the
ground plane. The MAX5856A has separate analog
and digital ground buses (AGND, PGND, and DGND,
respectively). Provide separate analog, digital, and
clock ground sections on the PC board with only one
point connecting the three planes. The ground connec-
tion points should be located underneath the device
and connected to the exposed paddle. Run digital sig-
nals above the digital ground plane and analog/clock
signals above the analog/clock ground plane. Digital
signals should be kept away from sensitive analog,
clock, and reference inputs. Keep digital signal paths
short and metal trace lengths matched to avoid propa-
gation delay and data skew mismatch.
Differential DC-Coupled Configuration
Power Supplies, Bypassing,
Decoupling, and Layout
______________________________________________________________________________________
Dual 8-Bit, 300Msps DAC with 4x/2x/1x
Interpolation Filters and PLL
The MAX5856A includes three separate power-supply
inputs: analog (AV
(PV
branch out to three separate power-supply lines (AV
DV
each power-supply line to the respective return line
using LC filters comprising ferrite beads and 10µF
capacitors. Filter each supply input locally with 0.1µF
ceramic capacitors to the respective return lines.
Note: To maintain the dynamic performance of the
Electrical Characteristics, ensure the voltage difference
between DV
150mV.
48-lead TQFP-EP:
Keep the device junction temperature below +125°C to
meet specified electrical performance. Lower the
power-supply voltage to maintain specified perfor-
mance when the DAC update rate approaches
300Msps and the ambient temperature equals +85°C.
Figure 9. Application with DC-Coupled Differential Outputs
DD
DD
, PV
). Use a single linear regulator power source to
DD
Thermal Characteristics and
DA0–DA7
DB0–DB7
8
8
) and returns (AGND, DGND, PGND). Filter
DD
, AV
1/2 MAX5856A
1/2 MAX5856A
AGND DGND PGND
AV
DD
θJA = 27.6°C/W
DD
DD
DV
, and PV
DD
), digital (DV
PV
DD
Thermal Resistance
DD
does not exceed
50Ω
50Ω
50Ω
50Ω
DD
Packaging
), and clock
OUTPA
OUTNA
OUTPB
OUTNB
DD
21
,