MAX547BEQH+D Maxim Integrated Products, MAX547BEQH+D Datasheet - Page 6

IC DAC 13BIT OCTAL PAR 44-PLCC

MAX547BEQH+D

Manufacturer Part Number
MAX547BEQH+D
Description
IC DAC 13BIT OCTAL PAR 44-PLCC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX547BEQH+D

Settling Time
5µs
Number Of Bits
13
Data Interface
Parallel
Number Of Converters
8
Voltage Supply Source
Dual ±
Power Dissipation (max)
1.07W
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-LCC, 44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Octal, 13-Bit Voltage-Output
DAC with Parallel Interface
6
(V
______________________________________________________________Pin Description
____________________________Typical Operating Characteristics (continued)
PLCC
DD
4, 42
9, 37
10
11
12
13
14
15
_______________________________________________________________________________________
1
2
3
5
6
7
8
= 5V, V
PIN
A: DIGITAL INPUTS, DAC A, DATA BITS from ALL Os to OAAAhex
B: OUTPUT, DAC B
PACK
42, 36
FLAT
3, 31
SS
40
41
43
44
ADJACENT-CHANNEL CROSSTALK
39
1
2
4
5
6
7
8
9
REF – = 4.096V, C
= -5V, REF_ = 4.096V, AGND_ = GND = 0V, T
AGNDCD
AGNDAB
REFCD
VOUTD
VOUTC
VOUTB
VOUTA
REFAB
NAME
L
L
C
V
V
D
W
D
C
500ns/div
DD
L
SS
C
A
S
R
R
L
B
D
= 50pF, R
Clear Input (active low). Driving this asynchronous input low sets the content of all latches to
1000hex. All DAC outputs are reset to AGND_.
Analog Ground for DAC C and DAC D
Reference Voltage Input for DAC C and DAC D. Bypass to AGNDCD with a 0.1µF to 1µF capacitor.
Negative Power Supply, -5V (2 pins). Connect both pins to the supply voltage. Bypass each pin
to the system analog ground with a 0.1µF to 1µF capacitor.
DAC D Output Voltage
DAC C Output Voltage
DAC B Output Voltage
DAC A Output Voltage
Positive Power Supply, 5V (2 pins). Connect both pins to the supply voltage. Bypass each pin to
the system analog ground with a 0.1µF to 1µF capacitor.
Reference Voltage Input for DAC A and DAC B. Bypass to AGNDAB with a 0.1µF to 1µF capacitor.
Analog Ground for DAC A and DAC B
Load Input (active low). Driving this asynchronous input low transfers the contents of input latches
A and B to the respective DAC latches.
Load Input (active low). Driving this asynchronous input low transfers the contents of input latches
C and D to the respective DAC latches.
Chip Select (active low)
Write Input (active low).
L
= 10k
B
5mV/div
A
5V/div
W
R
, along with
A
= +25°C, unless otherwise noted.)
C
S
, loads data into the DAC input latch selected by A0–A2.
FUNCTION
A: DIGITAL INPUTS, DAC A, DATA BITS from OAAAhex to ALL Os
B: OUTPUT, DAC B
ADJACENT-CHANNEL CROSSTALK
REF – = 4.096V, C
500ns/div
L
= 50pF, R
L
= 10k
B:
5mV/div
A:
5V/div

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