MAX547BEQH+D Maxim Integrated Products, MAX547BEQH+D Datasheet - Page 9

• Manufacturer Part Number: MAX547BEQH+D
• Description: IC DAC 13BIT OCTAL PAR 44-PLCC
• Manufacturer: Maxim Integrated Products

Specifications of MAX547BEQH+D

• Settling Time: 5µs
• Number Of Bits: 13
• Data Interface: Parallel
• Number Of Converters: 8
• Voltage Supply Source: Dual ±
• Power Dissipation (max): 1.07W
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC, 44-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2. Interface Truth Table
Figure 3. Write-Cycle Timing
–
C
—
D0–D12
L
1
1
1
1
1
1
1
0
A0–A2
—
R
–
LD –
WR
CS
NOTES:
1. ALL INPUT RISE AND FALL TIMES MEASURED FROM 10% TO 90% OF
2. MEASUREMENT REFERENCE LEVEL IS
3. IF LD – IS ACTIVATED WHILE WR IS LOW THEN LD – MUST STAY LOW
+5V. t
(V
FOR t 3 OR LONGER AFTER WR GOES HIGH.
–
L
—
INH
D
0
1
1
X
X
X
0
X
—
–
–
r
+ V
= t
INL
f
t
9
= 5ns.
)/2.
–
t
W
5
—
X
X
X
X
0
1
0
1
R
–
_______________________________________________________________________________________
–
C
—
X
X
X
X
0
1
0
1
t
S
1
–
t
2
t
Both latches transparent
Both latches latched
Both latches latched
Input latch transparent
Input latch latched
Input latch latched
DAC latch transparent
All input and DAC latches at
1000hex, outputs at AGND –
7
t
6
t
10
t
8
FUNCTION
t
t
3
3
Octal, 13-Bit Voltage-Output
DAC with Parallel Interface
The MAX547 can be used for multiplying applications.
Its reference accepts both DC and AC signals. The volt-
age at each REF_ input sets the full-scale output voltage
for its respective DACs. Since the reference inputs
accept only positive voltages, multiplying operation is
limited to two quadrants. Do not bypass the reference
inputs when applying AC signals to them. Refer to the
graphs in the Typical Operating Characteristics for
dynamic performance of the DACs and output buffers.
The MAX547 uses offset binary coding. A 13-bit twos-
complement code can be converted to a 13-bit offset
binary code by adding 2
For symmetrical bipolar operation, tie AGND_ to the
system ground. Table 3 shows the relationship between
digital code and output voltage. The following para-
graphs give a detailed explanation of this mode.
The DAC ladder output voltage (V
2 and level shifted by the reference voltage, which is
internally connected to the output amplifiers (Figure 1).
Since the feedback resistors are the same size, the
amplifier’s output voltage is 2 times the voltage at its
noninverting input, minus the reference voltage.
where V
ing input (DAC ladder output voltage), and REF_ is the
voltage applied to the reference input of the DAC.
With AGND_ connected to the system ground, the DAC
ladder output voltage is:
where D is the numeric value of the DAC’s binary input
code and n is the DAC’s resolution (13 bits). Replace
V
D ranges from 0 (2
__________Applications Information
DAC
1LSB REF –
VOUT
V
VOUT_
Digital Code and Analog Output Voltage
DAC
in the equation and calculate the output voltage.
DAC
Bipolar Output Voltage Range (AGND_ = 0V)
2
= REF –
D
n
2(V
is the voltage at the amplifier’s noninvert-
2
(REF – )
DAC
2
4096
0
D
13
) to 8191 (2
) REF –
1
2
D
12
REF –
2
12
D
13
– 1
= 4096.
Multiplying Operation
(REF – )
13
- 1).
REF –
REF –
DAC
) is multiplied by
4096
D
– 1
9