AD7835AS Analog Devices Inc, AD7835AS Datasheet

IC DAC 14BIT QUAD PARA 44-MQFP

AD7835AS

Manufacturer Part Number
AD7835AS
Description
IC DAC 14BIT QUAD PARA 44-MQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7835AS

Rohs Status
RoHS non-compliant
Settling Time
10µs
Number Of Bits
14
Data Interface
Parallel
Number Of Converters
4
Voltage Supply Source
Analog and Digital, Dual ±
Power Dissipation (max)
465mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-MQFP, 44-PQFP

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FEATURES
Four 14-bit DACs in one package
AD7834—serial loading
AD7835—parallel 8-bit/14-bit loading
Voltage outputs
Power-on reset function
Maximum/minimum output voltage range of ±8.192 V
Maximum output voltage span of 14 V
Common voltage reference inputs
User-assigned device addressing
Clear function to user-defined voltage
Surface-mount packages
AD7834—28-lead SOIC and PDIP
AD7835—44-lead MQFP and PLCC
APPLICATIONS
Process control
Automatic test equipment
General-purpose instrumentation
GENERAL DESCRIPTION
The AD7834 and AD7835 contain four 14-bit DACs on one
monolithic chip. The AD7834 and AD7835 have output
voltages in the range ±8.192 V with a maximum span of 14 V.
The AD7834 is a serial input device. Data is loaded in 16-bit
format from the external serial bus, MSB first after two leading 0s,
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
FSYNC
PAEN
SCLK
PA0
PA1
PA2
PA3
PA4
DIN
CONVERTER
SERIAL-TO-
AD7834
PARALLEL
CONTROL
ADDRESS
DECODE
LOGIC
AND
V
AGND
CC
REGISTER
REGISTER
REGISTER
REGISTER
V
INPUT
INPUT
INPUT
INPUT
DD
2
3
4
1
DGND
Figure 1. AD7834
V
SS
LATCH
LATCH
LATCH
LATCH
DAC 1
DAC 2
DAC 3
DAC 4
LDAC
V
REF
(–) V
DAC 1
DAC 2
DAC 3
DAC 4
REF
DSG
FUNCTIONAL BLOCK DIAGRAMS
(+)
×1
×1
×1
×1
V
V
V
V
CLR
OUT
OUT
OUT
OUT
1
2
3
4
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
into one via DIN, SCLK, and FSYNC . The AD7834 has five
dedicated package address pins, PA0 to PA4, that can be wired
to AGND or V
addressed in a multipackage application.
The AD7835 can accept either 14-bit parallel loading or double-
byte loading, where right-justified data is loaded in one 8-bit
byte and one 6-bit byte. Data is loaded from the external bus
into one of the input latches under the control of the WR , CS ,
BYSHF , and DAC channel address pins, A0 to A2.
With each device, the LDAC signal is used to update all four
DAC outputs simultaneously, or individually, on reception of
new data. In addition, for each device, the asynchronous CLR
input can be used to set all signal outputs, V
the user-defined voltage level on the device sense ground pin,
DSG. On power-on, before the power supplies have stabilized,
internal circuitry holds the DAC output voltage levels to within
±2 V of the DSG potential. As the supplies stabilize, the DAC
output levels move to the exact DSG potential (assuming CLR is
exercised).
The AD7834 is available in a 28-lead 0.3" SOIC package and a
28-lead 0.6" PDIP package, and the AD7835 is available in a
44-lead MQFP package and a 44-lead PLCC package.
BYSHF
DB13
DB0
WR
CS
A0
A1
A2
AD7835
ADDRESS
BUFFER
DECODE
INPUT
CC
AGND
14
to permit up to 32 AD7834s to be individually
©2003–2007 Analog Devices, Inc. All rights reserved.
V
CC
REGISTER
REGISTER
REGISTER
REGISTER
V
INPUT
INPUT
INPUT
INPUT
DGND
DD
1
2
3
4
Figure 2. AD7835
Quad 14-Bit DACs
V
SS
AD7834/AD7835
LDAC
LATCH
LATCH
LATCH
LATCH
DAC 1
DAC 2
DAC 3
DAC 4
V
V
REF
REF
(–)A V
(–)B V
DAC 3
DAC 2
DAC 4
DAC 1
OUT
REF
REF
(+)A
(+)B
1 to V
www.analog.com
LC
DSGA
DSGB
×1
×1
×1
×1
OUT
2
MOS
4, to
CLR
V
V
V
V
OUT
OUT
OUT
OUT
1
2
3
4

Related parts for AD7835AS

AD7835AS Summary of contents

Page 1

FEATURES Four 14-bit DACs in one package AD7834—serial loading AD7835—parallel 8-bit/14-bit loading Voltage outputs Power-on reset function Maximum/minimum output voltage range of ±8.192 V Maximum output voltage span Common voltage reference inputs User-assigned device addressing Clear function ...

Page 2

AD7834/AD7835 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagrams............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 AC Performance Characteristics ................................................ 5 Timing Specifications .................................................................. 6 Absolute Maximum Ratings............................................................ 7 Thermal Resistance ...................................................................... 7 ...

Page 3

SPECIFICATIONS ± 5 ± 5 −15 V ± 5%; AGND = DGND = Table 1. Parameter A ACCURACY Resolution 14 Relative Accuracy ±2 Differential ...

Page 4

AD7834/AD7835 ± 5 ± 5 −12 V ± 5%; AGND = DGND = Table 2. Parameter A ACCURACY Resolution 14 Relative Accuracy ±2 Differential ...

Page 5

AC PERFORMANCE CHARACTERISTICS These characteristics are included for design guidance and are not subject to production testing. Table 3. Parameter DYNAMIC PERFORMANCE Output Voltage Settling Time Digital-to-Analog Glitch Impulse DC Output Impedance Channel-to-Channel Isolation DAC-to-DAC Crosstalk Digital Crosstalk Digital Feedthrough—AD7834 ...

Page 6

AD7834/AD7835 TIMING SPECIFICATIONS ± 15. Table 4. Parameter Limit at T AD7834-SPECIFIC 2 t 100 ...

Page 7

ABSOLUTE MAXIMUM RATINGS T = 25°C unless otherwise noted. Transient currents 100 mA do not cause SCR latch-up 0 possible for this to happen during power supply sequencing, the diode protection ...

Page 8

AD7834/AD7835 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Table 7. AD7834 Pin Function Descriptions Pin No. Pin Mnemonic DSG 3 V (−) REF 4 V (+) REF 5, 24, 25, 26 22 ...

Page 9

NC 1 PIN 1 DSGA 2 IDENTIFIER OUT OUT NC 5 AD7835 A2 6 TOP VIEW (Not to Scale CLR 9 LDAC 10 ...

Page 10

AD7834/AD7835 Pin No. MQFP Pin No. PLCC Pin Mnemonic DB0 to DB13 32 38 DSGB 36 (+)B, V REF 38 44 AGND ...

Page 11

TYPICAL PERFORMANCE CHARACTERISTICS 1.0 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1 CODE/1000 Figure 9. Typical INL Plot 0.5 0.4 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –0 ...

Page 12

AD7834/AD7835 0.7 VERT = 100mV/DIV HORIZ = 1μs/DIV 0.6 0.5 0.4 0.3 0.2 0.1 0 –0.1 –0.2 Figure 15. Typical Digital/Analog Glitch Impulse 8 VERT = 2V/DIV HORIZ = 1.2μs/DIV (+) = +7V REF 2 V (–) ...

Page 13

TERMINOLOGY Relative Accuracy Relative accuracy or endpoint linearity is a measure of the maximum deviation from a straight line passing through the endpoints of the DAC transfer function measured after adjusting for zero error and full-scale error. It ...

Page 14

AD7834/AD7835 THEORY OF OPERATION DAC ARCHITECTURE Each channel consists of a segmented 14-bit R-2R voltage-mode DAC. The full-scale output voltage range is equal to the entire reference span of V (+) – V (−). The DAC coding is straight REF ...

Page 15

CONTROL BIT TO USE/IGNORE FOLLOWING 23 BITS OF INFORMATION CHANNEL ADDRESS MSB, D1 CHANNEL ADDRESS LSB, D2 PACKAGE ADDRESS MSB, PA4 PACKAGE ADDRESS, PA3 PACKAGE ADDRESS, PA2 PACKAGE ADDRESS, PA1 PACKAGE ADDRESS LSB, PA0 When 14-bit transfers are being used, ...

Page 16

AD7834/AD7835 BIPOLAR CONFIGURATION +15V R1 39kΩ 1μ (+) REF 1 AD588 AD7834 AD7835 100kΩ (–) REF 100kΩ 1 ...

Page 17

CONTROLLED POWER-ON OF THE OUTPUT STAGE A block diagram of the output stage of the AD7834/AD7835 is shown in Figure 21 capable of driving a load of 10 kΩ in parallel with 200 pF are ...

Page 18

AD7834/AD7835 DSG VOLTAGE RANGE During power-on, the V pins of the AD7834/AD7835 are OUT connected to the relevant DSG pins via G resistor, R. The DSG potential must obey the maximum ratings at all times. Thus, the voltage at DSG ...

Page 19

POWER-ON OF THE AD7834/AD7835 Power is normally applied to the AD7834/AD7835 in the following sequence: first V and V , then (+) and V (−). The V pins are not allowed to float when REF REF ...

Page 20

AD7834/AD7835 MICROPROCESSOR INTERFACING AD7834 TO 80C51 INTERFACE A serial interface between the AD7834 and the 80C51 micro- controller is shown in Figure 26. TXD of the 80C51 drives SCLK of the AD7834, while RXD drives the serial data line of ...

Page 21

First, data can be transferred using the autobuffering feature of the ADSP-2101, sending two 12-bit words directly after each other. This ensures a continuous transmit frame synchron- ization (TFS ) pulse. Second, the first data word is loaded to the ...

Page 22

AD7834/AD7835 INTERFACING THE AD7835—8-BIT INTERFACE Figure 32 shows an 8-bit interface between the AD7835 and a generic 8-bit microcontroller/DSP processor. Pin D13 to Pin D8 of the AD7835 are tied to DGND. Pin D7 to Pin D0 of the processor ...

Page 23

APPLICATIONS INFORMATION SERIAL INTERFACE TO MULTIPLE AD7834S Figure 33 shows how the package address pins of the AD7834 are used to address multiple AD7834s. This figure shows only 10 devices, but AD7834s can each be assigned a ...

Page 24

AD7834/AD7835 V +15V –15V OFFSET (+)A REF 8 V OUT 15 AD588 13 V (–)A REF OUT 9 1µF DSG A 0.1µF 1 AD7835 DSG B ...

Page 25

OUTLINE DIMENSIONS 28 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0. 0.250 (6.35) MAX 0.200 (5.08) 0.115 (2.92) 0.022 (0.56) 0.014 (0.36) 18.10 (0.7126) 17.70 (0.6969) 15 7.60 (0.2992) 7.40 (0.2913) 1 10.65 (0.4193) 14 10.00 (0.3937) 2.65 (0.1043) 2.35 ...

Page 26

AD7834/AD7835 0.048 (1.22) 0.042 (1.07) 6 0.048 (1.22) 7 PIN 1 0.042 (1.07) IDENTIFIER TOP VIEW (PINS DOWN 0.656 (16.66) 0.650 (16.51) 0.695 (17.65) 0.685 (17.40) 2.20 2.00 1.80 0.25 MIN 0.10 COPLANARITY VIEW A ROTATED 90° CCW ...

Page 27

... AD7835APZ-REEL −40°C to +85°C AD7835AS −40°C to +85°C AD7835AS-REEL −40°C to +85°C 1 AD7835ASZ −40°C to +85°C 1 AD7835ASZ-REEL −40°C to +85° RoHS Compliant Part. Linearity Error (LSBs) DNL (LSBs) ±2 ±0.9 ±2 ±0.9 ±2 ±0.9 ± ...

Page 28

AD7834/AD7835 NOTES ©2003–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01006-0-8/07(D) Rev Page ...

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