EPM7128AETC100-10N Altera, EPM7128AETC100-10N Datasheet - Page 30
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EPM7128AETC100-10N
Manufacturer Part Number
EPM7128AETC100-10N
Description
IC MAX 7000 CPLD 128 100-TQFP
Manufacturer
Altera
Series
MAX® 7000Ar
Datasheet
1.EPM7032AELC44-10N.pdf
(64 pages)
Specifications of EPM7128AETC100-10N
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
8
Number Of Macrocells
128
Number Of Gates
2500
Number Of I /o
84
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Voltage
3.3V
Memory Type
EEPROM
Number Of Logic Elements/cells
8
Cpld Type
EEPROM
No. Of Macrocells
128
No. Of I/o's
84
Propagation Delay
10ns
Global Clock Setup Time
6.6ns
Frequency
98MHz
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
544-2027
EPM7128AETC100-10N
EPM7128AETC100-10N
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Price
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MAX 7000A Programmable Logic Device Data Sheet
Notes to tables:
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10) For EPM7128A and EPM7256A devices, this pull-up exists while a device is programmed in-system.
(11) For MAX 7000AE devices, this pull-up exists while devices are programmed in-system and in unprogrammed
(12) Capacitance is measured at 25 °C and is sample-tested only. The
(13) The POR time for MAX 7000AE devices (except MAX 7128A and MAX 7256A devices) does not exceed 100 µs. The
30
For EPM7128A and EPM7256A devices only, V
See the Operating Requirements for Altera Devices Data Sheet.
Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents
less than 100 mA and periods shorter than 20 ns.
In MAX 7000AE devices, all pins, including dedicated inputs, I/O pins, and JTAG pins, may be driven before
V
These devices support in-system programming for –40
–40
These values are specified under the recommended operating conditions shown in
The parameter is measured with 50% of the outputs each sourcing the specified current. The I
to high-level TTL or CMOS output current.
The parameter is measured with 50% of the outputs each sinking the specified current. The I
low-level TTL or CMOS output current.
This value is specified for normal device operation. For MAX 7000AE devices, the maximum leakage current during
power-up is ±300
devices during power-up.
has a maximum capacitance of 20 pF.
sufficient V
reaches the sufficient POR voltage level.
CCINT
°
and 0
and V
°
CCINT
C, contact Altera Applications.
CCIO
voltage level for POR is 3.0 V. The device is fully initialized within the POR time after V
µ
are powered.
A. For EPM7128A and EPM7256A devices, leakage current during power-up is not specified.
CC
must rise monotonically.
°
to 100
°
C. For in-system programming support between
OE1
pin (high-voltage pin during programming)
Table 14 on page
Altera Corporation
OL
OH
parameter refers to
parameter refers
28.
CCINT