EPM1270T144C4 Altera, EPM1270T144C4 Datasheet - Page 26
![IC MAX II CPLD 1270 LE 144-TQFP](/photos/6/70/67061/544-144-tqfp_sml.jpg)
EPM1270T144C4
Manufacturer Part Number
EPM1270T144C4
Description
IC MAX II CPLD 1270 LE 144-TQFP
Manufacturer
Altera
Series
MAX® IIr
Specifications of EPM1270T144C4
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
6.2ns
Voltage Supply - Internal
2.5V, 3.3V
Number Of Logic Elements/blocks
1270
Number Of Macrocells
980
Number Of I /o
116
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
144-TQFP, 144-VQFP
Voltage
2.5V, 3.3V
Memory Type
FLASH
Number Of Logic Elements/cells
1270
For Use With
544-2380 - KIT DEV MAXII W/EPM 1270N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
544-1142
544-1325
544-1325
EPM1270T144C4ES
544-1325
544-1325
EPM1270T144C4ES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EPM1270T144C4N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
2–18
Figure 2–14. Global Clock Network
Notes to
(1) LAB column clocks in I/O block regions provide high fan-out output enable signals.
(2) LAB column clocks drive to the UFM block.
User Flash Memory Block
MAX II Device Handbook
I/O Block Region
LAB Column
Figure
clock[3..0]
2–14:
I/O Block Region
MAX II devices feature a single UFM block, which can be used like a serial EEPROM
for storing non-volatile information up to 8,192 bits. The UFM block connects to the
logic array through the MultiTrack interconnect, allowing any LE to interface to the
UFM block.
used to create customer interface or protocol logic to interface the UFM block data
outside of the device. The UFM block offers the following features:
■
■
■
■
4
Non-volatile storage up to 16-bit wide and 8,192 total bits
Two sectors for partitioned sector erase
Built-in internal oscillator that optionally drives logic array
Program, erase, and busy signals
4
(Note 1)
Figure 2–15
4
4
shows the UFM block and interface signals. The logic array is
4
CFM Block
UFM Block (2)
4
4
I/O Block Region
4
© October 2008 Altera Corporation
Chapter 2: MAX II Architecture
User Flash Memory Block
LAB Column
clock[3..0]