EPM3512AFC256-10 Altera, EPM3512AFC256-10 Datasheet - Page 22
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EPM3512AFC256-10
Manufacturer Part Number
EPM3512AFC256-10
Description
IC MAX 3000A CPLD 512 256-FBGA
Manufacturer
Altera
Series
MAX® 3000Ar
Datasheet
1.EPM3032ATC44-10N.pdf
(46 pages)
Specifications of EPM3512AFC256-10
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
32
Number Of Macrocells
512
Number Of Gates
10000
Number Of I /o
208
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-FBGA
Voltage
3.0 V ~ 3.6 V
Memory Type
EEPROM
Number Of Logic Elements/cells
32
Family Name
MAX 3000A
# Macrocells
512
Number Of Usable Gates
10000
Frequency (max)
125MHz
Propagation Delay Time
10ns
Number Of Logic Blocks/elements
32
# I/os (max)
208
Operating Supply Voltage (typ)
3.3V
In System Programmable
Yes
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2279
Available stocks
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Part Number
Manufacturer
Quantity
Price
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MAX 3000A Programmable Logic Device Family Data Sheet
Operating
Conditions
22
Symbol
V
V
I
T
T
T
OUT
Table 12. MAX 3000A Device Absolute Maximum Ratings
STG
A
J
CC
I
Supply voltage
DC input voltage
DC output current, per pin
Storage temperature
Ambient temperature
Junction temperature
Parameter
Figure 8. MAX 3000A AC Test Conditions
Tables 12
recommended operating conditions, DC operating conditions, and
capacitance for MAX 3000A devices.
Power supply transients can affect AC
measurements. Simultaneous transitions
of multiple outputs should be avoided for
accurate measurement. Threshold tests
must not be performed under AC
conditions. Large–amplitude, fast–
ground–current transients normally occur
as the device outputs discharge the load
capacitances. When these transients flow
through the parasitic inductance between
the device ground pin and the test system
ground, significant reductions in
observable noise immunity can result.
Numbers in brackets are for 2.5–V
outputs. Numbers without brackets are for
3.3–V devices or outputs.
through
With respect to ground
No bias
Under bias
PQFP and TQFP packages, under bias
15
provide information on absolute maximum ratings,
Conditions
(2)
Note (1)
Device
Output
Device input
rise and fall
times < 2 ns
[521 Ω]
[481 Ω]
703 Ω
620 Ω
Min
–0.5
–2.0
–25
–65
–65
Altera Corporation
Max
5.75
150
135
135
4.6
25
C1 (includes jig
capacitance)
VCC
To Test
System
Unit
mA
° C
° C
° C
V
V