CY39200V388-125MGC Cypress Semiconductor Corp, CY39200V388-125MGC Datasheet - Page 16

• Manufacturer Part Number: CY39200V388-125MGC
• Description: IC CPLD 200K GATE 388-BGA
• Manufacturer: Cypress Semiconductor Corp
• Series: Delta 39K™ ISR™r

Specifications of CY39200V388-125MGC

• Programmable Type: In-System Reprogrammable™ (ISR™) Flash
• Delay Time Tpd(1) Max: 10.0ns
• Voltage Supply - Internal: 2.5V, 3.3V
• Number Of Macrocells: 3072
• Number Of Gates: 288000
• Number Of I /o: 294
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 388-BGA
• Voltage: 1.8V, 2.5V, 3.3V
• Memory Type: FLASH
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Number Of Logic Elements/cells: -
• Other names: 428-1297

Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature (39k200, 208 EQFP) –45 C to +125 C
Storage Temperature
(all other densities & packages)....... .......... –65 C to +150 C
Soldering Temperature..................... ........................... 220 C
Ambient Temperature with
Power Applied.................................. ............ –40 C to +85 C
Junction Temperature ...................... ........................... 135 C
Operating Range
DC Characteristics
Notes:
Document #: 38-03039 Rev. *D
6.
7.
Commercial
Industrial
Param-
eter
V
V
I
I
I
I
I
I
I
I
IX
OZ
OS
BHL
BHH
BHLO
BHHO
CC0
DRINT
DRIO
Range
[7]
DC current into outputs is 36 mA with HSTL III, 48 mA with HSTL IV, and 36 mA with GTL+ (with 25 pull-up resistor and V
Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. V
problems caused by tester-ground degradation. Tested initially and after any design or process changes that may affect these parameters.
Description
Data Retention V
(config data may be lost below this)
Data Retention V
(config data may be lost below this)
Input Leakage Current
Output Leakage Current
Output Short Circuit Current
Input Bus Hold LOW Sustaining
Current
Input Bus Hold HIGH Sustaining
Current
Input Bus Hold LOW Overdrive Current V
Input Bus Hold HIGH Overdrive Current V
Standby Current
–40 C to +85 C
Temperature
0 C to +70 C
Ambient
CC
CCIO
Voltage
Voltage
–40 C to +100 C
Temperature
0 C to +85 C
PRELIMINARY
Junction
GND
GND V
V
V
V
V
V
V
39K30
39K50
39K100
39K165
39K200
Condition
CCIO
OUT
CC
PIN
CC
PIN
CC
CC
Output
Conditions
3.3V
2.5V
1.8V
1.5V
3.3V
2.5V
1.8V
1.5V
= Min.
= Min.
= Max.
= Max.
= V
= V
= 0.5V
= Max.
Test
V
IL
IH
O
I
3.6V
V
CCIO
V
V
V
DC Voltage Applied to Outputs in High-Z state –0.5V to 4.5V
DC Input voltage.............................. ................–0.5V to 4.5V
DC Current into Outputs.................. ...................... ±20 mA
Static Discharge Voltage (per JEDEC EIA./
JESD22–A114A).............................. ......................... >2001V
Latch-Up Current............................. ....................... >200 mA
1.5V ± 0.1V
1.5V ± 0.1V
1.8V ± 0.15V
1.8V ± 0.15V
3.3V ± 0.3V
2.5V ± 0.2V
3.3V ± 0.3V
2.5V ± 0.2V
CC
CC
CCIO
V
to Ground Potential (39KZ device) ...........–0.5V to 2.5V
to Ground Potential (39KV device) ...........–0.5V to 4.6V
CCIO
to Ground Potential............... ................–0.5V to 4.6V
Min.
V
+40
–10
–10
–40
1.5
1.2
CCIO
[5]
[5]
= 3.3V
All bins
+250
Max.
–160
–250
1.8V ± 0.15V
10
10
20
20
30
60
60
3.3V ± 0.3V
2.5V ± 0.2V
(39KV)
(39KZ)
V
or
CC
Min.
V
–10
–10
+30
–30
1.5
1.2
CCIO
OUT
Delta39K™ ISR™
= 0.5V has been chosen to avoid test
= 2.5V
V
V
Same as
All bins
Max.
–160
+200
–200
CCJTAG
CCCNFG
V
10
10
20
20
30
60
60
TT
CCIO
CPLD Family
= 1.5).
/
Min.
–10
–10
+25
–25
1.5
1.2
V
as V
V
Same
CCPLL
CCIO
-125 bin
Page 16 of 91
CC
10
10
3
3
5
= 1.8V
Max.
–160
+150
–150
10
10
V
CCPRG
3.3V
0.3V
-83 bin
±
12
12
20
40
40
[6]
Unit
mA
mA
V
V
A
A
A
A
A
A