CY39200V388-125MGC Cypress Semiconductor Corp, CY39200V388-125MGC Datasheet - Page 90

• Manufacturer Part Number: CY39200V388-125MGC
• Description: IC CPLD 200K GATE 388-BGA
• Manufacturer: Cypress Semiconductor Corp
• Series: Delta 39K™ ISR™r

Specifications of CY39200V388-125MGC

• Programmable Type: In-System Reprogrammable™ (ISR™) Flash
• Delay Time Tpd(1) Max: 10.0ns
• Voltage Supply - Internal: 2.5V, 3.3V
• Number Of Macrocells: 3072
• Number Of Gates: 288000
• Number Of I /o: 294
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 388-BGA
• Voltage: 1.8V, 2.5V, 3.3V
• Memory Type: FLASH
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Number Of Logic Elements/cells: -
• Other names: 428-1297

Table 12. 676 FBGA Pin Table (continued)
NoBL, PIM, Spread Aware, AnyVolt, Self-Boot, In-System Reprogrammable, ISR, and Delta39K are trademarks of
Cypress Semiconductor Corporation.
Warp is a registered trademark of Cypress Semiconductor Corporation.
Windows 95, Windows 98, and Windows NT are trademarks of Microsoft Corporation.
ZBT is a trademark of IDT. QDR is a trademark of Micron, IDT, and Cypress Semiconductor Corporation.
SpeedWave, and ViewDraw are trademarks of ViewLogic.
All product and company names mentioned in this document are the trademarks of their respective holders
Document #: 38-03039 Rev. *D
© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AE10
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE11
AE1
AE2
AE3
AE4
AE5
AE6
AE7
AE8
AE9
Pin
CY39100
GND
GND
GND
GND
GND
IO3
IO3
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
CY39165
GND
GND
GND
GND
GND
IO3
IO3
IO2
IO2
IO2
IO2
IO2
IO2
IO2
IO2
IO2
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
PRELIMINARY
CY39200
IO/V
IO/V
GND
GND
GND
GND
GND
IO3
IO3
IO3
IO2
IO2
IO2
IO2
IO2
IO2
IO2
IO2
IO2
IO3
IO3
IO3
IO3
IO3
IO3
IO3
IO3
NC
NC
NC
NC
REF3
REF3
Table 12. 676 FBGA Pin Table (continued)
AE24
AE25
AE26
AF10
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AF23
AF24
AF25
AF26
AF11
AF1
AF2
AF3
AF4
AF5
AF6
AF7
AF8
AF9
Pin
CY39100
GND
GND
GND
GND
GND
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Delta39K™ ISR™
CY39165
V
V
V
V
GND
GND
GND
GND
GND
CCIO2
CCIO2
CCIO3
CCIO3
IO2
IO2
IO2
IO2
IO2
IO2
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
CPLD Family
CY39200
Page 90 of 91
V
V
V
V
GND
GND
GND
GND
GND
CCIO2
CCIO2
CCIO3
CCIO3
IO2
IO2
IO2
IO2
IO2
IO2
IO3
IO3
IO3
IO3
IO3
IO3
NC
NC
NC
NC
NC
NC
NC
NC