XC3S700AN-4FGG484I Xilinx Inc, XC3S700AN-4FGG484I Datasheet - Page 89
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XC3S700AN-4FGG484I
Manufacturer Part Number
XC3S700AN-4FGG484I
Description
IC FPGA SPARTAN -3AN700K 484FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3S50AN-4TQG144C.pdf
(2 pages)
3.XC3S50AN-4TQG144C.pdf
(123 pages)
Specifications of XC3S700AN-4FGG484I
Total Ram Bits
368640
Number Of Logic Elements/cells
13248
Number Of Labs/clbs
1472
Number Of I /o
372
Number Of Gates
700000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-BBGA
No. Of Logic Blocks
1472
No. Of Gates
700000
No. Of Macrocells
13248
Family Type
Spartan-3AN
No. Of Speed Grades
4
No. Of I/o's
372
Clock
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
122-1528 - KIT STARTER SPARTAN-3 AN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1598
XC3S700AN-4FGG484I
XC3S700AN-4FGG484I
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S700AN-4FGG484I
Manufacturer:
XILINX
Quantity:
325
Company:
Part Number:
XC3S700AN-4FGG484I
Manufacturer:
Xilinx Inc
Quantity:
10 000
XC3S50AN Differential I/O Alignment Differences
Also, some differential I/O pairs on the XC3S50AN FPGA are aligned differently than the corresponding pairs on the
XC3S200AN or XC3S400AN FPGAs, as shown in
pair is shaded.
Table 74: Differential I/O Differences in FTG256
XC3S50AN Does Not Have BPI Mode Address Outputs
The XC3S50AN FPGA does not generate the BPI-mode address pins during configuration.
differences.
Table 75: XC3S50AN BPI Functional Differences
The Spartan-3AN FPGAs are pin compatible with the same density Spartan-3A FPGAs in the FT(G)256 package, although
the Spartan-3A FPGAs require an external configuration source.
DS557 (v4.1) April 1, 2011
Product Specification
FTG256 Ball
FTG256 Ball
P10
R13
N16
D15
D16
D14
C15
C16
T10
T14
P16
F13
E14
E13
J13
J12
N6
R5
T3
T5
Bank
Bank
2
1
IO_L04P_2/VS2
IO_L03N_2/VS1
IO_L06P_2
IO_L05N_2/D7
IO_L14P_2/MOSI/CSI_B
IO_L14N_2
IO_L20P_2
IO_L18N_2
IO_L03N_1
IO_L03P_1
IO_L10N_1
IO_L10P_1
IO_L20N_1
IO_L20P_1
IO_L22N_1
IO_L22P_1
IO_L23N_1
IO_L23P_1
IO_L24N_1
IO_L24P_1
XC3S50AN
XC3S50AN
Table
www.xilinx.com
74. All the mismatched pairs are in I/O Bank 2. The N side of each
IO_L03N_2/VS2
IO_L04P_2/VS1
IO_L05N_2
IO_L06P_2/D7
IO_L14N_2/MOSI/CSI_B
IO_L14P_2
IO_L18N_2
IO_L20P_2
XC3S200AN or XC3S400AN
IO_L03N_1/A1
IO_L03P_1/A0
IO_L10N_1/A9
IO_L10P_1/A8
IO_L20N_1/A19
IO_L20P_1/A18
IO_L22N_1/A21
IO_L22P_1/A20
IO_L23N_1/A23
IO_L23P_1/A22
IO_L24N_1/A25
IO_L24P_1/A24
XC3S200AN or XC3S400AN
Spartan-3AN FPGA Family: Pinout Descriptions
Table 75
summarizes these
89