EP20K100EQC208-1 Altera, EP20K100EQC208-1 Datasheet - Page 17

• Manufacturer Part Number: EP20K100EQC208-1
• Description: IC APEX 20KE FPGA 100K 208-PQFP
• Manufacturer: Altera
• Series: APEX-20K®r

Specifications of EP20K100EQC208-1

• Number Of Logic Elements/cells: 4160
• Number Of Labs/clbs: 416
• Total Ram Bits: 53248
• Number Of I /o: 151
• Number Of Gates: 263000
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Altera Corporation
LE Operating Modes
The APEX 20K LE can operate in one of the following three modes:
■
■
■
Each mode uses LE resources differently. In each mode, seven available
inputs to the LE—the four data inputs from the LAB local interconnect,
the feedback from the programmable register, and the carry-in and
cascade-in from the previous LE—are directed to different destinations to
implement the desired logic function. LAB-wide signals provide clock,
asynchronous clear, asynchronous preset, asynchronous load,
synchronous clear, synchronous load, and clock enable control for the
register. These LAB-wide signals are available in all LE modes.
The Quartus II software, in conjunction with parameterized functions
such as LPM and DesignWare functions, automatically chooses the
appropriate mode for common functions such as counters, adders, and
multipliers. If required, the designer can also create special-purpose
functions that specify which LE operating mode to use for optimal
performance.
Normal mode
Arithmetic mode
Counter mode
Figure 8
APEX 20K Programmable Logic Device Family Data Sheet
shows the LE operating modes.
17