EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 32
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EP2AGX45DF29I5N
Manufacturer Part Number
EP2AGX45DF29I5N
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX45DF29I5N.pdf
(306 pages)
Specifications of EP2AGX45DF29I5N
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
45125
# I/os (max)
364
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
45125
Ram Bits
3565158.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2AGX45DF29I5N
Manufacturer:
ALTERA
Quantity:
201
Company:
Part Number:
EP2AGX45DF29I5N
Manufacturer:
ALTERA
Quantity:
853
1–30
Table 1–35. Transceiver Specifications for Arria II GZ Devices (Part 3 of 6)
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
Differential on-chip
termination resistors
Differential and common
mode return loss
Programmable PPM
detector
Run length
Programmable equalization
t
t
t
t
Receiver CDR
3 dB Bandwidth in
lock-to-data (LTD) mode
Receiver buffer and CDR
offset cancellation time (per
channel)
LTR
LTR_LTD_Manual
LTD_Manual
LTD_Auto
(6)
Description
(9)
(5)
Symbol/
(8)
(7)
PCIe (Gen 1 and
(OIF) CEI PHY at
100 setting
120 setting
Serial RapidIO
Serial RapidIO
Serial RapidIO
Serial RapidIO
150- setting
85 setting
SONET OC12
SONET OC48
CPRI LV/HV,
Conditions
CEI SR/LR,
6.375 Gbps
3.125 Gbps
PCIe Gen1
PCIe Gen2
1.25 Gbps
2.5 Gbps
Gen 2),
HiGig+,
SR/LR,
OBSAI,
XAUI,
SATA
XAUI
GIGE
—
—
—
—
—
—
—
—
Min
—
—
—
15
—
—
—
–C3 and –I3
± 62.5, 100, 125, 200, 250, 300, 500, 1,000
100 ± 20%
120 ± 20%
150 ± 20%
85 ± 20%
Typ
—
—
—
—
—
—
—
(1)
17000
4000
4000
Max
200
16
75
—
Compliant
2.0 - 3.5
40 - 65
20 - 35
10 - 18
10 - 18
14 - 19
10 - 18
6 - 10
6 - 10
3 - 6
Chapter 1: Device Datasheet for Arria II Devices
Min
—
—
—
15
—
—
—
–C4 and –I4
100 ± 20%
120 ± 20%
150 ± 20%
December 2010 Altera Corporation
85 ± 20%
Typ
—
—
—
—
—
—
—
Switching Characteristics
17000
4000
4000
Max
200
16
75
—
recon
cycles
fig_
ppm
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
clk
dB
—
µs
µs
UI
ns
ns