EP3C120F780I7 Altera, EP3C120F780I7 Datasheet - Page 33
![IC CYCLONE III FPGA 120K 780FBGA](/photos/6/72/67270/544-780-fbga_sml.jpg)
EP3C120F780I7
Manufacturer Part Number
EP3C120F780I7
Description
IC CYCLONE III FPGA 120K 780FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C120F780I7.pdf
(274 pages)
Specifications of EP3C120F780I7
Number Of Logic Elements/cells
119088
Number Of Labs/clbs
7443
Total Ram Bits
3981312
Number Of I /o
531
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
119088
# I/os (max)
531
Frequency (max)
437.5MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
119088
Ram Bits
3981312
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FBGA
For Use With
544-2589 - KIT DEV EMB CYCLONE III EDITION544-2566 - KIT DEV DSP CYCLONE III EDITION544-2444 - KIT DEV CYCLONE III EP3C120
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3C120F780I7
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP3C120F780I7N
Manufacturer:
ALTERA
Quantity:
118
Chapter 2: Logic Elements and Logic Array Blocks in the Cyclone III Device Family
Logic Array Blocks
Logic Array Blocks
Topology
Figure 2–4. Cyclone III Device Family LAB Structure
© December 2009
Direct link
interconnect
from adjacent
block
Direct link
interconnect
to adjacent
block
Altera Corporation
Logic array blocks (LABs) contain groups of LEs.
Each LAB consists of the following features:
■
■
■
■
■
The local interconnect transfers signals between LEs in the same LAB. Register chain
connections transfer the output of one LE register to the adjacent LE register in a LAB.
The Quartus II Compiler places associated logic in a LAB or adjacent LABs, allowing
the use of local and register chain connections for performance and area efficiency.
Figure 2–4
16 LEs
LAB control signals
LE carry chains
Register chains
Local interconnect
shows the LAB structure for the Cyclone III device family.
LAB
Local Interconnect
Row Interconnect
Cyclone III Device Handbook, Volume 1
Direct link
interconnect
from adjacent
block
Direct link
interconnect
to adjacent
block
Column
Interconnect
2–5