EP2S60F672C5 Altera, EP2S60F672C5 Datasheet - Page 121
![IC STRATIX II FPGA 60K 672-FBGA](/photos/6/72/67292/544-672-fbga_sml.jpg)
EP2S60F672C5
Manufacturer Part Number
EP2S60F672C5
Description
IC STRATIX II FPGA 60K 672-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet
1.EP2S15F484I4N.pdf
(238 pages)
Specifications of EP2S60F672C5
Number Of Logic Elements/cells
60440
Number Of Labs/clbs
3022
Total Ram Bits
2544192
Number Of I /o
492
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
60440
# I/os (max)
492
Frequency (max)
609.76MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
60440
Ram Bits
2544192
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
672
Package Type
FC-FBGA
For Use With
544-1700 - DSP KIT W/STRATIX II EP2S60N544-1697 - NIOS II KIT W/STRATIX II EP2S60N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1128
EP2S60F672C5ES
EP2S60F672C5ES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2S60F672C5
Manufacturer:
SMARTLINK
Quantity:
8
Company:
Part Number:
EP2S60F672C5N
Manufacturer:
ALTERA
Quantity:
238
Part Number:
EP2S60F672C5N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
May 2007
FPP
AS
PS
Configuration
Table 3–5. Stratix II Configuration Features (Part 1 of 2)
Scheme
MAX II device or microprocessor and
flash device
Enhanced configuration device
Serial configuration device
MAX II device or microprocessor and
flash device
Enhanced configuration device
Download cable
f
Configuration Method
you need to support configuration input voltages of 1.8 V/1.5 V, you
should set the VCCSEL to a logic high and the V
contains the configuration inputs to 1.8 V/1.5 V.
For more information on multi-volt support, including information on
using TDO and nCEO in multi-volt systems, refer to the Stratix II
Architecture chapter in volume 1 of the Stratix II Device Handbook.
Configuration Schemes
You can load the configuration data for a Stratix II device with one of five
configuration schemes (see
application. You can use a configuration device, intelligent controller, or
the JTAG port to configure a Stratix II device. A configuration device can
automatically configure a Stratix II device at system power-up.
You can configure multiple Stratix II devices in any of the five
configuration schemes by connecting the configuration enable (nCE) and
configuration enable output (nCEO) pins on each device.
Stratix II FPGAs offer the following:
■
■
■
Table 3–5
configuration scheme.
(4)
Configuration data decompression to reduce configuration file
storage
Design security using configuration data encryption to protect your
designs
Remote system upgrades for remotely updating your Stratix II
designs
summarizes which configuration features can be used in each
Design Security Decompression
Table
v
v
v
v
v
(1)
3–5), chosen on the basis of the target
Stratix II Device Handbook, Volume 1
v
v
v
v
v
v
CCIO
(1)
(2)
Configuration & Testing
of the bank that
Remote System
Upgrade
v
v
v
v
v
(3)
3–7