XC3S50-4VQG100I Xilinx Inc, XC3S50-4VQG100I Datasheet - Page 74

• Manufacturer Part Number: XC3S50-4VQG100I
• Description: SPARTAN-3A FPGA 50K STD 100-VQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3r

Specifications of XC3S50-4VQG100I

• Total Ram Bits: 73728
• Number Of Logic Elements/cells: 1728
• Number Of Labs/clbs: 192
• Number Of I /o: 63
• Number Of Gates: 50000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 100-TQFP
• No. Of Logic Blocks: 192
• No. Of Gates: 50000
• No. Of Macrocells: 1728
• Family Type: Spartan-3
• No. Of Speed Grades: 4
• No. Of I/o's: 63
• Clock Management: DLL
• Package: 100VTQFP
• Family Name: Spartan®-3
• Device Logic Units: 1728
• Device System Gates: 50000
• Maximum Internal Frequency: 630 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 63
• Ram Bits: 73728
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Spartan-3 FPGA Family: DC and Switching Characteristics
Table 46: Output Timing Adjustments for IOB
74
Single-Ended Standards
GTL
GTL_DCI
GTLP
GTLP_DCI
HSLVDCI_15
HSLVDCI_18
HSLVDCI_25
HSLVDCI_33
HSTL_I
HSTL_I_DCI
HSTL_III
HSTL_III_DCI
HSTL_I_18
HSTL_I_DCI_18
HSTL_II_18
HSTL_II_DCI_18
HSTL_III_18
HSTL_III_DCI_18
LVCMOS12
LVCMOS15
LVCMOS25 with 12mA Drive
Following Signal Standard
Convert Output Time from
and Fast Slew Rate to the
(IOSTANDARD)
Slow
Slow
Fast
Fast
12 mA
12 mA
2 mA
4 mA
6 mA
2 mA
4 mA
6 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
Add the Adjust-
–0.02
0.13
0.03
0.23
1.51
0.81
0.27
0.28
0.60
0.59
0.19
0.20
0.18
0.17
0.75
0.28
0.28
7.60
7.42
6.67
3.16
2.70
2.41
4.55
3.76
3.57
3.55
3.00
3.11
1.71
1.44
1.26
1.11
Speed Grade
ment Below
-5
0
–0.01
0.02
0.15
0.04
0.27
1.74
0.94
0.31
0.32
0.69
0.68
0.22
0.23
0.21
0.19
0.86
0.32
0.32
8.73
8.53
7.67
3.63
3.10
2.77
5.23
4.32
4.11
4.09
3.45
3.57
1.96
1.66
1.44
1.27
-4
Units
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Table 46: Output Timing Adjustments for IOB (Continued)
LVDCI_15
LVDCI_DV2_15
LVCMOS18
LVDCI_18
LVDCI_DV2_18
LVCMOS25
LVDCI_25
LVDCI_DV2_25
LVCMOS25 with 12mA Drive
Following Signal Standard
Convert Output Time from
and Fast Slew Rate to the
(IOSTANDARD)
Slow
Slow
Fast
Fast
12 mA
16 mA
12 mA
16 mA
12 mA
16 mA
24 mA
12 mA
16 mA
24 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
DS099-3 (v2.5) December 4, 2009
Add the Adjust-
–0.02
–0.04
1.51
1.32
5.49
3.45
2.84
2.62
2.11
2.07
2.50
1.15
0.96
0.87
0.79
0.76
0.81
0.67
6.43
4.15
3.38
2.99
2.53
2.50
2.22
3.27
1.87
0.32
0.19
0.27
0.16
Speed Grade
ment Below
-5
0
Product Specification
–0.01
–0.02
1.74
1.52
6.31
3.97
3.26
3.01
2.43
2.38
2.88
1.32
1.10
1.01
0.91
0.87
0.94
0.77
7.39
4.77
3.89
3.44
2.91
2.87
2.55
3.76
2.15
0.37
0.22
0.31
0.19
-4
0
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