XC3S1500-5FGG320C Xilinx Inc, XC3S1500-5FGG320C Datasheet - Page 152
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XC3S1500-5FGG320C
Manufacturer Part Number
XC3S1500-5FGG320C
Description
SPARTAN-3A FPGA 1.5M 320-FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3r
Datasheet
1.XC3S50-4VQG100C.pdf
(217 pages)
Specifications of XC3S1500-5FGG320C
Number Of Logic Elements/cells
29952
Number Of Labs/clbs
3328
Total Ram Bits
589824
Number Of I /o
221
Number Of Gates
1500000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
320-BGA
For Use With
NANO-SPARTAN - KIT NANOBOARD AND SPARTAN3 DC807-1001 - DAUGHTER CARD XILINX SPARTAN 3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S1500-5FGG320C
Manufacturer:
XILINX
Quantity:
104
Company:
Part Number:
XC3S1500-5FGG320C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Spartan-3 FPGA Family: Pinout Descriptions
FG320 Footprint
152
156
16
7
0
G
M
A
B
C
D
E
F
H
K
L
N
P
R
T
U
V
J
I/O: Unrestricted, general-purpose user I/O
DCI: User I/O or reference resistor input for
bank
CONFIG: Dedicated configuration pins
N.C.: No unconnected pins in this package
VREF_7
VREF_6
L16P_7
L16N_7
L17N_7
L20P_7
L23N_7
L35N_7
L39N_7
L40N_6
L35P_6
L24P_6
L20P_6
L17P_6
L16P_6
L16N_6
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
VCCAUX
VCCAUX
VREF_6
VREF_6
L01N_0
L01P_7
L17P_7
L20N_7
L23P_7
L35P_7
L39P_7
L40P_6
L35N_6
L24N_6
L20N_6
L17N_6
L01P_6
L01P_5
VRP_0
VRN_7
VRN_6
GND
GND
CS_B
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
2
RDWR_B
VCCO_6
VCCO_7
VREF_0
VREF_7
VREF_6
L01P_0
L01N_7
L19P_7
L19N_7
L24P_7
L34P_7
L34N_6
L23N_6
L19P_6
L19N_6
L01N_6
L01N_5
VRN_0
VRP_7
VRP_6
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M1
I/O
3
L15N_0
L09N_0
L09P_0
L21N_7
L21P_7
L24N_7
L34N_7
L40P_7
L39P_6
L34P_6
L23P_6
L21N_6
L21P_6
L06P_5
L10P_5
L10N_5
VRN_5
VRP_5
TDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M2
4
PROG_B HSWAP_
VREF_7
L15P_0
L25N_0
L10N_0
L10P_0
L22P_7
L22N_7
L27N_7
L40N_7
L39N_6
L27P_6
L22P_6
L22N_6
L15P_5
L06N_5
L16P_5
L16N_5
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M0
5
Bank 0
Bank 5
Figure 47: FG320 Package Footprint (top view)
VCCO_0
VCCINT
VCCINT
VCCINT
VCCINT VCCINT
VCCO_5
VREF_0
VREF_5
L25P_0
L27P_7
VREF_7
L27N_6
L27N_5
L15N_5
GND
GND
EN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
6
12
40
8
4
VCCINT
VCCO_7
VCCO_7
VCCO_6
VCCO_6
VCCAUX
VCCAUX
VREF_5
L30N_0
L27N_0
L27P_0
L27P_5
L28N_5
L28P_5
L29P_5
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D6
D7
7
DUAL: Configuration pin, then possible
user I/O
GCLK: User I/O or global clock buffer input
JTAG: Dedicated JTAG port pins
GND: Ground
VCCO_0
VCCO_0
VCCO_5
VCCO_5
L30P_0
L28N_0
L28P_0
L29N_0
L29P_0
L30N_5
L30P_5
L29N_5
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
8
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VCCO_0
VCCO_5
VREF_0
L31N_0
L32N_0
L32N_5
GCLK2
VREF_5
L31N_5
L31P_0
GCLK7
L32P_0
GCLK6
L32P_5
L31P_5
GCLK3
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D4
D5
9
VCCO_1
VCCO_4 VCCO_4
VREF_1
VREF_4
L31N_1
L31P_1
L32N_1
L32P_1
L32N_4
L32P_4
L31N_4
L31P_4
GCLK5
GCLK4
GCLK1
GCLK0
INIT_B
GND
GND
GND
GND
DOUT
BUSY
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
10
VCCO_4
VCCO_1
VCCO_1
L30N_1
L29N_1
L30N_4
L29N_4
L30P_1
L29P_1
L30P_4
L29P_4
L28P_4
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
11
D2
D3
VCCAUX
VREF_1
VCCAUX
VCCINT VCCINT
VCCO_2
VCCO_2
VCCO_3
VCCO_3
VCCINT VCCINT
L28N_1
L28P_1
L27P_1
L27P_4
L27N_4
L28N_4
GND
GND
12
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DIN
I/O
D1
D0
VCCINT
VCCINT
VCCO_1
VCCO_4
L27N_1
L27N_2
L39N_3
L25N_4
VREF_4
L24P_1
L27P_3
L25P_4
GND
GND
29
28
12
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
13
8
Bank 4
Bank 1
VREF: User I/O or input voltage reference for
bank
VCCO: Output voltage supply for bank
VCCINT: Internal core voltage supply
(+1.2V)
VCCAUX: Auxiliary voltage supply
(+2.5V)
VREF_2
VREF_4
L16N_1
L16P_1
L15N_1
L24N_1
L22N_2
L22P_2
L27P_2
L40P_2
L39P_3
L27N_3
L22N_3
L22P_3
L06N_4
L06P_4
L10N_4
L10P_4
TCK
14
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DS099-4 (v2.5) December 4, 2009
VREF_1
L10N_1
L10P_1
L15P_1
L21P_2
L21N_2
L24N_2
L34P_2
L40N_2
L34N_3
L23N_3
L21P_3
L21N_3
L09N_4
L09P_4
DONE
CCLK
TDO
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
15
VCCO_2
VCCO_3
VREF_2
VREF_3
VREF_3
VREF_3
L01N_1
L01N_2
L19N_2
L19P_2
L24P_2
L34N_2
L34P_3
L23P_3
L17N_3
L17P_3
L01P_3
L01N_4
L01P_4
VRP_1
VRP_2
VRN_3
VRP_4
VRN_4
GND
GND
TMS
16
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Product Specification
VCCAUX
VCCAUX
VREF_3
VREF_4
L01P_1
L01P_2
L17N_2
L20N_2
L23P_2
L35N_2
L39P_2
L40N_3
L35P_3
L24P_3
L20P_3
L19N_3
L01N_3
VRN_1
VRN_2
VRP_3
GND
GND
17
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
ds099-3_16_121103
VREF_2
VREF_2
L16N_2
L16P_2
L17P_2
L20P_2
L23N_2
L35P_2
L39N_2
L40P_3
L35N_3
L24N_3
L20N_3
L19P_3
L16N_3
L16P_3
GND
GND
GND
GND
18
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
R