XC5202-6PQ100C Xilinx Inc, XC5202-6PQ100C Datasheet - Page 6

• Manufacturer Part Number: XC5202-6PQ100C
• Description: IC FPGA 64 CLB'S 100-PQFP
• Manufacturer: Xilinx Inc
• Series: XC5200r

Specifications of XC5202-6PQ100C

• Number Of Logic Elements/cells: 256
• Number Of Labs/clbs: 64
• Number Of I /o: 81
• Number Of Gates: 3000
• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 100-BQFP
• Case: QFP100
• Dc: 99+
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Total Ram Bits: -
• Other names: 122-1132

XC5200 Series Field Programmable Gate Arrays
Figure 6: XC5200 CY_MUX Used for Adder Carry Propagate
Carry Function
The XC5200 family supports a carry-logic feature that
enhances the performance of arithmetic functions such as
counters, adders, etc. A carry multiplexer (CY_MUX) sym-
bol is used to indicate the XC5200 carry logic. This symbol
represents the dedicated 2:1 multiplexer in each LC that
performs the one-bit high-speed carry propagate per logic
cell (four bits per CLB).
While the carry propagate is performed inside the LC, an
adjacent LC must be used to complete the arithmetic func-
tion.
The carry propagate is performed on the CLB shown,
7-88
Figure 6
A1 and B1
to any two
0
A0
or
B0
A0 and B0
to any two
A3
or
B3
A3 and B3
to any two
A2
or
B2
A2 and B2
to any two
A1
or
B1
represents an example of an adder function.
F=0
DI
DI
DI
DI
F4
F3
F2
F1
F4
F3
F2
F1
F4
F3
F2
F1
F4
F3
F2
F1
XOR
XOR
XOR
XOR
Product Obsolete or Under Obsolescence
CI
CY_MUX
CO
carry in
CY_MUX
CY_MUX
CY_MUX
CY_MUX
Initialization of
carry chain (One Logic Cell)
carry out
CE
CK
CLR
D
D
D
D
FD
FD
FD
FD
LC3
LC2
LC1
LC0
DO
DO
DO
DO
Q
Q
X
Q
X
X
X
Q
half sum3
carry2
half sum2
carry1
half sum1
carry0
half sum0
carry3
which also generates the half-sum for the four-bit adder. An
adjacent CLB is responsible for XORing the half-sum with
the corresponding carry-out. Thus an adder or counter
requires two LCs per bit. Notice that the carry chain
requires an initialization stage, which the XC5200 family
accomplishes using the carry initialize (CY_INIT) macro
and one additional LC. The carry chain can propagate ver-
tically up a column of CLBs.
The XC5200 library contains a set of Relationally-Placed
Macros (RPMs) and arithmetic functions designed to take
advantage of the dedicated carry logic. Using and modify-
ing these macros makes it much easier to implement cus-
DI
DI
DI
DI
F4
F3
F2
F1
F4
F3
F2
F1
F4
F3
F2
F1
F4
F3
F2
F1
XOR
XOR
XOR
XOR
CI
CO
November 5, 1998 (Version 5.2)
CE
CK
CLR
D
D
D
D
FD
FD
FD
FD
LC3
LC2
LC1
LC0
DO
DO
DO
DO
Q
Q
X
Q
X
X
X
Q
sum3
sum2
sum1
sum0
X5709
R