AT94K10AL-25AQC Atmel, AT94K10AL-25AQC Datasheet - Page 141
AT94K10AL-25AQC
Manufacturer Part Number
AT94K10AL-25AQC
Description
IC FPSLIC 10K GATE 25MHZ 100TQFP
Manufacturer
Atmel
Series
FPSLIC®r
Specifications of AT94K10AL-25AQC
Core Type
8-bit AVR
Speed
25MHz
Interface
I²C, UART
Program Sram Bytes
20K-32K
Fpga Sram
4kb
Data Sram Bytes
4K ~ 16K
Fpga Core Cells
576
Fpga Gates
10K
Fpga Registers
846
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATSTK594 - BOARD FPSLIC DAUGHTER FOR STK500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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1138I–FPSLI–1/08
Figure 4-47. Block diagram of the 2-wire Serial Bus Interface
The CPU interfaces with the 2-wire Serial Interface via the following five I/O registers: the 2-wire
Serial Bit-rate Register (TWBR), the 2-wire Serial Control Register (TWCR), the 2-wire Serial
Status Register (TWSR), the 2-wire Serial Data Register (TWDR), and the 2-wire Serial Address
Register (TWAR, used in Slave mode).
The 2-wire Serial Bit-rate Register – TWBR
Bit
$1C ($3C)
Read/Write
Initial Value
SDA
SCL
7
TWBR7
R/W
0
OUTPUT
OUTPUT
INPUT
INPUT
6
TWBR6
R/W
0
5
TWBR5
R/W
0
TWAR
ADDRESS REGISTER
TWDR
STATUS DECODER
STATE MACHINE
SERIAL CLOCK
COMPARATOR
ARBITRATION
START/STOP
GENERATOR
DATA SHIFT
AND SYNC
REGISTER
4
TWBR4
R/W
0
STATUS
AND
AND
AT94KAL Series FPSLIC
3
TWBR3
R/W
0
2
TWBR2
R/W
0
TWCR
TWSR
REGISTER
REGISTER
CONTROL
CONTROL
STATUS
TIMING
AND
ACK
1
TWBR1
R/W
0
0
TWBR0
R/W
0
TWBR
141
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