XE8807AMI026TLF Semtech, XE8807AMI026TLF Datasheet - Page 96

IC MCU LOW PWR MTP FLASH 32-TQFP

XE8807AMI026TLF

Manufacturer Part Number
XE8807AMI026TLF
Description
IC MCU LOW PWR MTP FLASH 32-TQFP
Manufacturer
Semtech
Datasheet

Specifications of XE8807AMI026TLF

Applications
Sensing Machine
Core Processor
RISC
Program Memory Type
FLASH (11 kB)
Controller Series
XE8000
Ram Size
512 x 8
Interface
UART, USRT
Number Of I /o
24
Voltage - Supply
2.4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFP, 32-VQFP
For Use With
XE8000MP - PROG BOARD AND PROSTART2 CARD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
XE8807AMI026TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XE8807AMI026TLF
Manufacturer:
IDT
Quantity:
62
Part Number:
XE8807AMI026TLF
Manufacturer:
Semtech
Quantity:
10 000
14.12.1.2.1
To set the XE1201A in reception mode, set the pin EN to 1 and the pin RXTX to 1. The data rate of the XE1201A
by default is 16kbit/s and the bit synchronizer is enabled by default. This means that the data registers of the
XE1201A can remain in the default settings shown in Table 14-20. The serial interface connections of Figure 14-8
are therefore not required.
14.12.1.2.2
Set-up the RF interface of the microcontroller circuit as a receiver (RfifEnRx = 1 and RfifEnTx = 0).
Assume that the RC clock frequency used in the microcontroller is 1.0 MHz. To select the correct baud rate of 16
kbit/s according to the equation in chapter 14.10, fine*coarse=1.0e06/(16*16e3)=3.9. This can be approximated at
4 (see specification in Table 14-19). This can be done by setting RfifBRCoarse = 01 and RfifBRFine = 0000.
The external bit synchronization clock is switched off by setting the bit RfifRxClock = 0.
The decoder is enabled and set to NRZ level decoding by setting RfifEnCod = 1 and RfifPCM = 000.
The start pattern detection is enabled by setting RfifEnStart = 11 and writing 11010111 to RfifRxSPat.
The start sequence detection interrupt is enabled by setting RfifRxIrqEn = 001.
The set-up of the interface is summarized in the Table 14-21.
14.12.1.2.3
In order to handle the received data by interrupt, enable the RF interface reception interrupt in the interrupt handler
of the circuit.
Data received before the first start pattern detection after the enabling of the interface are not relevant since we are
not yet synchronized to the messages. Since the start detection interrupt has been enabled, nothing has to be
done until the interrupt occurs.
When the first interrupt occurs, we are synchronized to the messages. In order to read data in an efficient way, the
interrupt source is modified and set to “Rx FIFO full” by writing 100 to RfifRxIrqEn. Once this is done, we can wait
for the next interrupt to download the received message.
At each new interrupt, we can now read 4 bytes of the received message by reading the register RegRfifRx 4
consecutive times. The interrupt should be served before the next byte is received since otherwise data may be
© Semtech 2006
Register
Register A
Register B
Register C
Table 14-20. XE1201A default register set-up (see XE1201A datasheet for bit explanation)
XE1201A set-up
RF interface set-up
Data reception
0
0
0
13
RegRfifRxSPat
0
0
1
12
RegRfifCmd1
RegRfifCmd2
RegRfifCmd3
Register
Table 14-21. RF interface set-up
0
0
0
11
0
0
1
10
0
0
0
9
14-16
0
0
1
8
0
0
0
7
0
0
0
6
00010000
11100000
00100010
11010111
contents
0
0
1
5
1
0
0
4
0
0
0
3
XE8806A/XE8807A
0
0
0
2
0
0
0
1
0
0
0
0
www.semtech.com

Related parts for XE8807AMI026TLF