CY7C63413-PVC Cypress Semiconductor Corp, CY7C63413-PVC Datasheet - Page 20

• Manufacturer Part Number: CY7C63413-PVC
• Description: IC MCU 8K USB LS PERIPH 48-SSOP
• Manufacturer: Cypress Semiconductor Corp
• Series: M8™r

Specifications of CY7C63413-PVC

• Applications: USB Microcontroller
• Core Processor: M8B
• Program Memory Type: OTP (8 kB)
• Controller Series: CY7C634xx
• Ram Size: 256 x 8
• Interface: PS2, USB
• Number Of I /o: 32
• Voltage - Supply: 4 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1319

12.0
USB Device Address A includes three endpoints: EPA0, EPA1, and EPA2. End Point 0 (EPA0) allows the USB host to recognize,
set-up, and control the device. In particular, EPA0 is used to receive and transmit control (including set-up) packets.
12.1
The USB Controller provides one USB device address with three endpoints. The USB Device Address Register contents are
cleared during a reset, setting the USB device address to zero and marking this address as disabled. Figure 12-1 shows the
format of the USB Address Register.
Bit 7 (Device Address Enable) in the USB Device Address Register must be set by firmware before the serial interface engine
(SIE) will respond to USB traffic to this address. The Device Address in bits [6:0] must be set by firmware during the USB enu-
meration process to an address assigned by the USB host that does not equal zero. This register is cleared by a hardware reset
or the USB bus reset.
12.2
The USB controller communicates with the host using dedicated FIFOs, one per endpoint. Each endpoint FIFO is implemented
as 8 bytes of dedicated SRAM. There are three endpoints defined for Device “A” that are labeled “EPA0,” “EPA1,” and EPA2.”
All USB devices are required to have an endpoint number 0 (EPA0) that is used to initialize and control the USB device. End Point
0 provides access to the device configuration information and allows generic USB status and control accesses. End Point 0 is
bidirectional as the USB controller can both receive and transmit data.
The endpoint mode registers are cleared during reset. The EPA0 endpoint mode register uses the format shown below:
Bits[7:5] in the endpoint 0 mode registers (EPA0) are “sticky” status bits that are set by the SIE to report the type of token that
was most recently received. The sticky bits must be cleared by firmware as part of the USB processing.
The endpoint mode registers for EPA1 and EPA2 do not use bits [7:5] as shown below:
The ‘Acknowledge’ bit is set whenever the SIE engages in a transaction that completes with an ‘ACK’ packet.
Endpoint 0
Reserved
Received
Control Bits
Address
Enable
Device
set-up
000
001
010
011
100
101
110
111
USB Ports
Device Endpoints (3)
USB Device
Endpoint 0
Reserved
Received
Address
Device
Bit 6
Figure 12-3. USB Device Endpoint Mode Registers 0x14h, 0x16h (read/write)
In
Not forcing (SIE controls driver)
Force SE0 (D+ low, D– low)
Force SE0 (D low, D+ low)
Force K (D+ high, D– low)
Force J (D+ low, D– high)
Force D HiZ, D+ HiZ
Force D low, D+ HiZ
Force D HiZ, D+ low
Figure 12-2. USB Device EPA0 Mode Register 0x12h (read/write)
Figure 12-1. USB Device Address Register 0x10h (read/write)
Control action
Endpoint 0
Reserved
Received
Address
Device
Bit 5
Out
Acknowledge
Acknowledge
Address
Device
Bit 4
20
Address
Device
Mode
Mode
Bit 3
Bit 3
Bit 3
Address
Device
Mode
Mode
Bit 2
Bit 2
Bit 2
CY7C63411/12/13
CY7C63511/12/13
Address
Device
Mode
Mode
Bit 1
Bit 1
Bit 1
Address
Device
Mode
Mode
Bit 0
Bit 0
Bit 0