CY7C63413-PVC Cypress Semiconductor Corp, CY7C63413-PVC Datasheet - Page 6

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CY7C63413-PVC

Manufacturer Part Number
CY7C63413-PVC
Description
IC MCU 8K USB LS PERIPH 48-SSOP
Manufacturer
Cypress Semiconductor Corp
Series
M8™r
Datasheet

Specifications of CY7C63413-PVC

Applications
USB Microcontroller
Core Processor
M8B
Program Memory Type
OTP (8 kB)
Controller Series
CY7C634xx
Ram Size
256 x 8
Interface
PS2, USB
Number Of I /o
32
Voltage - Supply
4 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1319

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C63413-PVC
Manufacturer:
CY
Quantity:
1 000
Part Number:
CY7C63413-PVC
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
2.0
The CY7C63411/12/13 and CY7C63511/12/13 are 8-bit RISC One Time Programmable (OTP) microcontrollers. The instruction
set has been optimized specifically for USB operations, although the microcontrollers can be used for a variety of non-USB
embedded applications.
The CY7C63411/12/13 features 32 general purpose I/O (GPIO) pins to support USB and other applications. The I/O pins are
grouped into four ports (Port 0 to 3) where each port can be configured as inputs with internal pull-ups, open drain outputs, o r
traditional CMOS outputs. 24 GPIO pins (Ports 0 to 2) are rated at 7 mA typical sink current. There are 8 GPIO pins (Port 3) which
are rated at 12 mA typical sink current, which allows these pins to drive LEDs. Multiple GPIO pins can be connected together to
drive a single output for more drive current capacity. Additionally, each I/O pin can be used to generate a GPIO interrupt to the
microcontroller. Note the GPIO interrupts all share the same “GPIO” interrupt vector.
The CY7C63511/12/13 features an additional 8 I/O pins in the DAC port. Every DAC pin includes an integrated 14-Kohm pull-up
resistor. When a “1” is written to a DAC I/O pin, the output current sink is disabled and the output pin is driven high by the internal
pull-up resistor. When a “0” is written to a DAC I/O pin, the internal pull-up is disabled and the output pin provides the programmed
amount of sink current. A DAC I/O pin can be used as an input with an internal pull-up by writing a “1” to the pin.
The sink current for each DAC I/O pin can be individually programmed to one of sixteen values using dedicated Isink registers.
DAC bits [1:0] can be used as high current outputs with a programmable sink current range of 3.2 to 16 mA (typical). DAC bits
[7:2] have a programmable current sink range of 0.2 to 1.0 mA (typical). Again, multiple DAC pins can be connected together to
drive a single output that requires more sink current capacity. Each I/O pin can be used to generate a DAC interrupt to the
microcontroller and the interrupt polarity for each DAC I/O pin is individually programmable. The DAC port interrupts share a
separate “DAC” interrupt vector.
The Cypress microcontrollers use an external 6 MHz ceramic resonator to provide a reference to an internal clock generator. This
clock generator reduces the clock-related noise emissions (EMI). The clock generator provides the 6 and 12 MHz clocks that
remain internal to the microcontroller.
The CY7C63411/12/13 and CY7C63511/12/13 are offered with three EPROM options to maximize flexibility and minimize cost.
The CY7C63411 and CY7C63511 have 4 Kilobytes of EPROM. The CY7C63412 and CY7C63512 have 6 Kilobytes of EPROM.
The CY7C63413 and CY7C63513 have 8 Kilobytes of EPROM.
These parts include power-on reset logic, a watchdog timer, a vectored interrupt controller, and a 12-bit free-running timer. The
power-on reset (POR) logic detects when power is applied to the device, resets the logic to a known state, and begins executing
instructions at EPROM address 0x0000h. The watchdog timer can be used to ensure the firmware never gets stalled for more
than approximately 8 ms. The firmware can get stalled for a variety of reasons, including errors in the code or a hardware failure
such as waiting for an interrupt that never occurs. The firmware should clear the watchdog timer periodically. If the watchdog timer
is not cleared for approximately 8 ms, the microcontroller will generate a hardware watchdog reset.
The microcontroller supports 8 maskable interrupts in the vectored interrupt controller. Interrupt sources include the USB Bus-Re-
set, the 128 microsecond and 1.024 ms outputs from the free-running timer, three USB endpoints, the DAC port, and the GPIO
ports. The timer bits cause an interrupt (if enabled) when the bit toggles from low “0” to high “1”. The USB endpoints interrupt
after either the USB host or the USB controller sends a packet to the USB. The DAC ports have an additional level of masking
that allows the user to select which DAC inputs can cause a DAC interrupt. The GPIO ports also have a level of masking to select
which GPIO inputs can cause a GPIO interrupt. For additional flexibility, the input transition polarity that causes an interrupt is
programmable for each pin of the DAC port. Input transition polarity can be programmed for each GPIO port as part of the port
configuration. The interrupt polarity can be either rising edge (“0” to “1”) or falling edge (“1” to “0”).
The free-running 12-bit timer clocked at 1 MHz provides two interrupt sources as noted above (128 sec and 1.024 ms). The
timer can be used to measure the duration of an event under firmware control by reading the timer twice: once at the start of the
event, and once after the event is complete. The difference between the two readings indicates the duration of the event measured
in microseconds. The upper 4 bits of the timer are latched into an internal register when the firmware reads the lower 8 bits. A
read from the upper 4 bits actually reads data from the internal register, instead of the timer. This feature eliminates the need for
firmware to attempt to compensate if the upper 4 bits happened to increment right after the lower 8 bits are read.
The CY7C63411/12/13 and CY7C63511/12/13 include an integrated USB serial interface engine (SIE) that supports the integrat-
ed peripherals. The hardware supports one USB device address with three endpoints. The SIE allows the USB host to commu-
nicate with the function integrated into the microcontroller.
Finally, the CY7C63411/12/13 and CY7C63511/12/13 support PS/2 operation. With appropriate firmware the D+ and D– USB
pins can also be used as PS/2 clock and data signals. Products utilizing these devices can be used for USB and/or PS/2 operation
with appropriate firmware.
Functional Overview
6
CY7C63411/12/13
CY7C63511/12/13

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