CY7C63001C-SXCT Cypress Semiconductor Corp, CY7C63001C-SXCT Datasheet - Page 10

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CY7C63001C-SXCT

Manufacturer Part Number
CY7C63001C-SXCT
Description
IC MCU 4K USB MCU LS 20SOIC
Manufacturer
Cypress Semiconductor Corp
Series
M8™r
Datasheet

Specifications of CY7C63001C-SXCT

Applications
USB Microcontroller
Core Processor
M8A
Program Memory Type
OTP (4 kB)
Controller Series
CY7C630xx
Ram Size
128 x 8
Interface
USB
Number Of I /o
12
Voltage - Supply
4 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Document #: 38-08026 Rev. *B
Table 6-2. Output Control Truth Table
To configure a GPIO pin as an input, a “1” should be written to
the Port Data Register bit associated with that pin to disable
the pull-down function of the Isink DAC (see Figure 6-9).When
the Port Data Register is read, the bit value is a “1” if the
voltage on the pin is greater than the Schmitt trigger threshold,
or “0” if it is below the threshold. In applications where an
internal pull-up is required, the R
engaged by writing a “0” to the appropriate bit in the Port
Pull-up Register.
Both Port 0 and Port 1 Pull-up Registers are write only (see
Figures 6-10 and 6-11). The Port 0 Pull-up Register is located
at I/O address 0x08 and Port 1 Pull-up Register is mapped to
address 0x09. The contents of the Port Pull-up Registers are
cleared during reset, allowing the outputs to be controlled by
the state of the Data Registers. The Port Pull-up Registers also
select the polarity of transition that generates a GPIO interrupt.
A “0” selects a HIGH to LOW transition while a “1” selects a
LOW to HIGH transition.
Reserved
PULL0.7
PULL1.7
b7
W
b7
b7
0x
W
W
0
x
Data Register
0
0
1
1
Reserved
PULL0.6
PULL1.6
b6
W
b6
b6
W
W
0
0
x
up
Reserved
PULL0.5
PULL1.5
Figure 6-10. Port 0 Pull-up Register (Address 0x08)
Port Pull-up Register
Figure 6-11. Port 1 Pull-up Register (Address 0x09)
Figure 6-12. Port Isink Register for One GPIO Line
pull-up resistor can be
b5
W
b5
b5
W
W
0
0
x
0
1
0
1
UNUSED
PULL0.4
PULL1.4
b4
b4
b4
W
W
W
0
0
x
Writing a “0” to the Data Register drives the output LOW.
Instead of providing a fixed output drive, the USB Controller
allows the user to select an output sink current level for each
I/O pin. The sink current of each output is controlled by a
dedicated Port Isink Register. The lower four bits of this
register contain a code selecting one of sixteen sink current
levels. The upper four bits of the register are ignored. The
format of the Port Isink Register is shown in Figure 6-12.
Port 0 is a low-current port suitable for connecting photo
transistors. Port 1 is a high current port capable of driving
LEDs. See section 8.0 for current ranges. 0000 is the lowest
drive strength. 1111 is the highest.
The write-only sink current control registers for Port 0 outputs
are assigned from I/O address 0x30 to 0x37 with the control
bits for P00 starting at 0x30. Port 1 sink current control
registers are assigned from I/O address 0x38 to 0x3F with the
control bits for P10 starting at 0x38. All sink current control
registers are cleared during a reset, resulting in the minimum
current sink setting.
PULL1.3
PULL0.3
ISINK3
Pull-up Resistor (‘1’)
b3
b3
b3
W
W
W
Output at I/O Pin
0
0
Sink Current (‘0’)
Sink Current (‘0’)
x
Hi-Z
PULL1.2
PULL0.2
ISINK2
b2
b2
b2
W
W
W
0
x
0
PULL1.1
PULL0.1
ISINK1
b1
b1
Interrupt Polarity
b1
W
W
W
0
x
0
CY7C63001C
CY7C63101C
High to Low
Low to High
High to Low
Low to High
Page 10 of 28
PULL1.0
PULL0.0
ISINK0
b0
b0
W
W
b0
W
0
x
0

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