CY7C63001C-SXCT Cypress Semiconductor Corp, CY7C63001C-SXCT Datasheet - Page 5

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CY7C63001C-SXCT

Manufacturer Part Number
CY7C63001C-SXCT
Description
IC MCU 4K USB MCU LS 20SOIC
Manufacturer
Cypress Semiconductor Corp
Series
M8™r
Datasheet

Specifications of CY7C63001C-SXCT

Applications
USB Microcontroller
Core Processor
M8A
Program Memory Type
OTP (4 kB)
Controller Series
CY7C630xx
Ram Size
128 x 8
Interface
USB
Number Of I /o
12
Voltage - Supply
4 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Document #: 38-08026 Rev. *B
6.1.3
The USB Controller includes 128 bytes of data RAM. The
upper 16 bytes of the data memory are used as USB FIFOs
for Endpoint 0 and Endpoint 1. Each endpoint is associated
with an 8-byte FIFO.
The USB controller includes two pointers into data RAM, the
Program Stack Pointer (PSP) and the Data Stack Pointer
(DSP). The value of PSP after reset is 0x00. The PSP incre-
ments by 2 whenever a CALL instruction is executed and it
decrements by 2 whenever a RET instruction is used.
Data Memory Organization
after reset
firmware
DSP
DSP
user
PSP
Figure 6-2. Data Memory Space
The DSP pre-decrements by 1 whenever a PUSH instruction
is executed and it increments by 1 after a POP instruction is
used. The default value of the DSP after reset is 0x00, which
would cause the first PUSH to write into USB FIFO space for
Endpoint 1. Therefore, the DSP should be mapped to a
location such as 0x70 before initiating any data stack opera-
tions. Refer to the Reset section for more information about
DSP remapping after reset. Figure 6-2 illustrates the Data
Memory Space.
Address
0x00
0x02
0x04
0x70
0x77
0x78
0x7F
USB FIFO - Endpoint 0
USB FIFO - Endpoint 1
CY7C63001C
CY7C63101C
Page 5 of 28

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