CY7C64714-100AXC Cypress Semiconductor Corp, CY7C64714-100AXC Datasheet - Page 8

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CY7C64714-100AXC

Manufacturer Part Number
CY7C64714-100AXC
Description
IC MCU USB EZ FX1 16KB 100LQFP
Manufacturer
Cypress Semiconductor Corp
Series
EZ-USB FX1™r
Datasheet

Specifications of CY7C64714-100AXC

Applications
USB Microcontroller
Core Processor
8051
Program Memory Type
ROMless
Controller Series
CY7C647xx
Ram Size
16K x 8
Interface
I²C, USB, USART
Number Of I /o
40
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C64714-100AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
4.12
4.12.1
4.12.2
4.12.3
A separate 8-byte buffer at 0xE6B8-0xE6BF holds the Setup
data from a CONTROL transfer.
4.12.4
Endpoints 0 and 1 are the same for every configuration.
Endpoint 0 is the only CONTROL endpoint, and endpoint 1 can
be either BULK or INTERRUPT. The endpoint buffers can be
configured in any 1 of the 12 configurations shown in the
vertical columns. In full-speed, BULK mode uses only the first
64 bytes of each buffer, even though memory exists for the
allocation of the isochronous transfers in BULK mode the
unused endpoint buffer space is not available for other opera-
tions. An example endpoint configuration would be:
EP2—1023 double buffered; EP6—64 quad buffered (column 8).
Document #: 38-08039 Rev. *C
Notes:
• 3 × 64 bytes
• 8 × 512 bytes (Endpoints 2, 4, 6, 8)
• EP0—Bidirectional endpoint zero, 64-byte buffer
• EP1IN, EP1OUT—64-byte buffers, bulk or interrupt
• EP2,4,6,8—Eight 512-byte buffers, bulk, interrupt, or isoch-
4.
5.
ronous, of which only the transfer size is available.
EP4 and EP8 can be double buffered, while EP2 and 6 can
be either double, triple, or quad buffered. Regardless of the
physical size of the buffer, each endpoint buffer accommo-
dates only one full-speed packet. For bulk endpoints the
maximum number of bytes it can accommodate is 64, even
though the physical buffer size is 512 or 1024. For an
ISOCHRONOUS endpoint the maximum number of bytes
it can accommodate is 1023. For endpoint configuration
options, see Figure 4-5.
“0” means “not implemented.”
“2×” means “double buffered.”
Endpoint RAM
Size
Organization
Setup Data Buffer
Endpoint Configurations
EP0 IN&OUT
EP1 OUT
EP1 IN
(Endpoints 0 and 1)
EP8
EP2
EP4
EP6
64
64
64
64
64
64
64
64
1
64
64
64
EP4
EP6
EP2
64
64
64
64
64
64
64
64
64
64
64
2
EP2
EP4
EP6
1023
1023
64
64
64
64
64
64
64
3
Figure 4-5. Endpoint Configuration
EP2
EP6
EP8
64
64
64
64
64
64
64
64
64
64
64
4
EP2
EP6
64
64
64
64
64
64
64
64
64
64
64
5
EP2
EP6
1023
1023
64
64
64
64
64
64
64
6
4.12.5
Table 4-6. Default Alternate Settings
4.13
4.13.1
The FX1 slave FIFO architecture has eight 512-byte blocks in
the endpoint RAM that directly serve as FIFO memories, and
are controlled by FIFO control signals (such as IFCLK, SLCS#,
SLRD, SLWR, SLOE, PKTEND, and flags). The usable size of
these buffers depend on the USB transfer mode as described
in Section 4.12.2.
In operation, some of the eight RAM blocks fill or empty from
the SIE, while the others are connected to the I/O transfer
logic. The transfer logic takes two forms, the GPIF for internally
generated control signals, or the slave FIFO interface for
externally controlled transfers.
4.13.2
The FX1 endpoint FIFOS are implemented as eight physically
distinct 256x16 RAM blocks. The 8051/SIE can switch any of
the RAM blocks between two domains, the USB (SIE) domain
and the 8051-I/O Unit domain. This switching is done virtually
Alternate
ep0
ep1out
ep1in
ep2
ep4
ep6
ep8
Setting
EP2
EP8
EP6
1023
1023
64
64
64
64
64
64
64
7
Default Alternate Settings
External FIFO Interface
Architecture
Master/Slave Control Signals
64 64
0
0 64 bulk
0 64 bulk
0 64 bulk out (2×) 64 int out (2×) 64 iso out (2×)
0 64 bulk out (2×) 64 bulk out (2×) 64 bulk out (2×)
0 64 bulk in (2×) 64 int in (2×)
0 64 bulk in (2×) 64 bulk in (2×) 64 bulk in (2×)
EP2
1023
1023
EP6
64
64
64
64
64
64
64
8
EP2
1023
EP6
1023
1023
1023
1
64
64
64
9
EP2
EP6
EP8
64
64
64
64
64
64
64
64
64
64
64
10
64
64 int
64 int
EP2 EP2
1023
EP8
1023
1023
1023
64
CY7C64713/14
64
64
64
64
2
11
[4, 5]
1023
1023
1023
1023
12
64
64
64
64
64 int
64 int
64 iso in (2×)
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