PIC12F629T-I/SN Microchip Technology, PIC12F629T-I/SN Datasheet - Page 47

• Manufacturer Part Number: PIC12F629T-I/SN
• Description: IC MCU CMOS 8BIT 1K FLASH 8-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F629T-I/SN

• Program Memory Type: FLASH
• Program Memory Size: 1.75KB (1K x 14)
• Package / Case: 8-SOIC (3.9mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: RS- 232/USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: PIC12F629-I/SNTR; PIC12F629T-I/SNTR; PIC12F629T-I/SNTR

7.2
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 7-3. The source
impedance (R
impedance directly affect the time required to charge
the capacitor C
impedance varies over the device voltage (V
Figure 7-3. The maximum recommended imped-
ance for analog sources is 10 k. As the impedance
EQUATION 7-1:
FIGURE 7-3:
 2010 Microchip Technology Inc.
T
T
T
ACQ
ACQ
C
Note 1: The reference voltage (V
A/D Acquisition Requirements
2: The charge holding capacitor (C
3: The maximum recommended impedance for analog sources is 10 k. This is required to meet the pin
=
=
=
=
=
=
=
=
leakage specification.
Amplifier Settling Time +
Hold Capacitor Charging Time +
Temperature Coefficient
T
2s + T
C
- 120pF (1k + 7k + 10k) In(0.0004885)
16.47s
2s + 16.47s + [(50°C -25C)(0.05s/C)
19.72s
S
AMP
HOLD
) and the internal sampling switch (R
Legend: C
HOLD
+ T
C
(R
VA
. The sampling switch (R
C
+ [(Temperature -25°C)(0.05s/°C)]
ACQUISITION TIME
ANALOG INPUT MODEL
IC
+ T
V
I
R
SS
C
R
+ R
LEAKAGE
T
PIN
IC
HOLD
S
COFF
SS
ANx
C
5 pF
+ R
HOLD
PIN
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
S
) In(1/2047)
various junctions
) must be allowed
REF
) has no effect on the equation, since it cancels itself out.
HOLD
V
DD
DD
), see
V
V
) is not discharged after each conversion.
T
T
SS
SS
= 0.6V
= 0.6V
)
)
I
± 500 nA
LEAKAGE
is decreased, the acquisition time may be decreased.
After the analog input channel is selected (changed),
this acquisition must be done before the conversion
can be started.
To
Equation 7-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D).
The 1/2 LSb error is the maximum error allowed for
the A/D to meet its specified resolution.
To calculate the minimum acquisition time, T
the PIC
R
IC
 1K
calculate
®
Mid-Range Reference Manual (DS33023).
V
SS R
Sampling
Switch
DD
6V
5V
4V
3V
2V
PIC12F629/675
SS
the
Sampling Switch
5 6 7 8 9 10 11
V
minimum
SS
C
= DAC capacitance
= 120 pF
(k)
HOLD
acquisition
DS41190G-page 47
ACQ
time,
, see