PIC12F629T-I/SN Microchip Technology, PIC12F629T-I/SN Datasheet - Page 54
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PIC12F629T-I/SN
Manufacturer Part Number
PIC12F629T-I/SN
Description
IC MCU CMOS 8BIT 1K FLASH 8-SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F629T-ISN.pdf
(136 pages)
2.PIC12F629T-ISN.pdf
(8 pages)
3.PIC12F629T-ISN.pdf
(24 pages)
4.PIC12F675-ESN.pdf
(132 pages)
Specifications of PIC12F629T-I/SN
Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-SOIC (3.9mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
RS- 232/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
PIC12F629-I/SNTR
PIC12F629T-I/SNTR
PIC12F629T-I/SNTR
PIC12F629T-I/SNTR
PIC12F629T-I/SNTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12F629T-I/SN
Manufacturer:
MICROCHIP
Quantity:
50 000
PIC12F629/675
9.1
The Configuration bits can be programmed (read as
‘0’), or left unprogrammed (read as ‘1’) to select various
device configurations, as shown in Register 9.2. These
bits are mapped in program memory location 2007h.
REGISTER 9-1:
DS41190G-page 54
bit 13
Legend:
P = Programmed using ICSP™
R = Readable bit
-n = Value at POR
bit 13-12
bit 11-9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
Note 1:
R/P-1
BG1
2:
3:
4:
5:
R/P-1
Configuration Bits
BG0
The Bandgap Calibration bits are factory programmed and must be read and saved prior to erasing the device as spec-
ified in the PIC12F629/675 Programming Specification. These bits are reflected in an export of the Configuration Word.
Microchip Development Tools maintain all Calibration bits to factory settings.
The entire data EEPROM will be erased when the code protection is turned off.
The entire program memory will be erased, including OSCCAL value, when the code protection is turned off.
Enabling Brown-out Detect does not automatically enable Power-up Timer.
When MCLR is asserted in INTOSC or RC mode, the internal clock oscillator is disabled.
BG1:BG0: Bandgap Calibration bits for BOD and POR voltage
00 = Lowest bandgap voltage
11 = Highest bandgap voltage
Unimplemented: Read as ‘0’
CPD: Data Code Protection bit
1 = Data memory code protection is disabled
0 = Data memory code protection is enabled
CP: Code Protection bit
1 = Program Memory code protection is disabled
0 = Program Memory code protection is enabled
BODEN: Brown-out Detect Enable bit
1 = BOD enabled
0 = BOD disabled
MCLRE: GP3/MCLR Pin Function Select bit
1 = GP3/MCLR pin function is MCLR
0 = GP3/MCLR pin function is digital I/O, MCLR internally tied to V
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC2:FOSC0: Oscillator Selection bits
111 = RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN
110 = RC oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN
101 = INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN
100 = INTOSC oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN
011 = EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN
010 = HS oscillator: High speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN
001 = XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN
000 = LP oscillator: Low-power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN
U-0
—
CONFIG: CONFIGURATION WORD (ADDRESS: 2007h)
U-0
—
Writable bit
1 = bit is set
U-0
—
(3)
R/P-1
CPD
(2)
U = Unimplemented bit, read as ‘0’
0 = bit is cleared
R/P-1
(4)
CP
(5)
BODEN
R/P-1
Note:
MCLRE
R/P-1
x = bit is unknown
(1)
memory space. It belongs to the special con-
figuration memory space (2000h-3FFFh),
which can be accessed only during program-
ming. See PIC12F629/675 Programming
Specification for more information.
Address 2007h is beyond the user program
DD
PWRTE
R/P-1
WDTE
R/P-1
2010 Microchip Technology Inc.
F0SC2
R/P-1
F0SC1
R/P-1
F0SC0
R/P-1
bit 0