MPC8250AVRIHBC Freescale Semiconductor, MPC8250AVRIHBC Datasheet - Page 2

IC MPU POWERQUICC II 516-PBGA

MPC8250AVRIHBC

Manufacturer Part Number
MPC8250AVRIHBC
Description
IC MPU POWERQUICC II 516-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8250AVRIHBC

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
200MHz
Voltage
1.8V
Mounting Type
Surface Mount
Package / Case
516-PBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
200 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Family Name
MPC82XX
Device Core
PowerQUICC II
Device Core Size
32b
Frequency (max)
200MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.8V
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
516
Package Type
TEPBGA
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Peak Reflow Compatible (260 C)
Yes
For Use With
CWH-PPC-8248N-VE - KIT EVAL SYSTEM QUICCSTART 8248
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8250AVRIHBC
Manufacturer:
MOTOLOLA
Quantity:
875
Part Number:
MPC8250AVRIHBC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC8250AVRIHBC
Manufacturer:
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Features
Figure 1
1
The major features of the MPC8250 are as follows:
2
Parallel I/O
Generators
Baud Rate
Features
Footprint-compatible with the MPC8260
Dual-issue integer core
— A core version of the EC603e microprocessor
— System core microprocessor supporting frequencies of 150–200 MHz
— Separate 16-Kbyte data and instruction caches:
— PowerPC architecture-compliant memory management unit (MMU)
— Common on-chip processor (COP) test interface
— High-performance (4.4–5.1 SPEC95 benchmark at 200 MHz; 280 Dhrystones MIPS at
Timers
shows the block diagram for the MPC8250.
MCC2
– Four-way set associative
– Physically addressed
– LRU replacement algorithm
200 MHz)
G2 Core
Communication Processor Module (CPM)
FCC1
4 TDM Ports
Interrupt
Controller
32-bit RISC Microcontroller
FCC2
and Program ROM
FCC3
Time Slot Assigner
16 Kbytes
16 Kbytes
D-Cache
I-Cache
D-MMU
I-MMU
Dual-Port RAM
MPC8250 Hardware Specifications, Rev. 2
SCC1
32 Kbytes
Figure 1. MPC8250 Block Diagram
SCC2
SCC3
3 MII
Ports
Serial Interface
4 Virtual
DMAs
Serial
IDMAs
SCC4
SMC1
System Interface Unit
SMC2
Memory Controller
Bus Interface Unit
System Functions
Clock Counter
60x-to-Local
60x-to-PCI
Bridge
Bridge
(SIU)
Non-Multiplexed
SPI
I/O
I
2
C
Freescale Semiconductor
60x Bus
32 bits, up to 66 MHz
32 bits, up to 66 MHz
Local Bus
PCI Bus
or

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