MPC8260AVVPJDB Freescale Semiconductor, MPC8260AVVPJDB Datasheet - Page 26

IC MPU POWERQUICC II 480-TBGA

MPC8260AVVPJDB

Manufacturer Part Number
MPC8260AVVPJDB
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8260AVVPJDB

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
300MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Family Name
MPC82XX
Device Core
PowerQUICC II
Device Core Size
32b
Frequency (max)
300MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
2.2V
Operating Supply Voltage (min)
1.9V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
480
Package Type
TBGA
For Use With
MPC8260ADS-TCOM - BOARD DEV ADS POWERQUICC II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Clock Configuration Modes
3.2
The MPC8265 and the MPC8266 have three clocking modes: local, PCI host, and PCI agent. The clocking
mode is set according to three input pins—PCI_MODE, PCI_CFG[0], PCI_MODCK—as shown in
Table
In addition, note the following:
26
1
2
3
MODCK_H–MODCK[1–3]
Because of speed dependencies, not all of the possible configurations in
The user should choose the input clock frequency and the multiplication factors such that the frequency of the CPU
is equal to or greater than 150 MHz and the CPM ranges between 66–233 MHz.
Input clock frequency is given only for the purpose of reference. The user should set MODCK_H–MODCK_L so that
the resulting configuration does not exceed the frequency rating of the user’s part.
15.
MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0
PCI Mode
1000_001
1000_010
1000_011
1000_100
PCI_MODE
In PCI mode only, PCI_MODCK comes from the LGPL5 pin and
MODCK_H[0–3] comes from {LGPL0, LGPL1, LGPL2, LGPL3}.
The minimum Tval = 2 when PCI_MODCK = 1, and the minimum Tval = 1
when PCI_MODCK = 0. Therefore, designers should use clock
configurations that fit this condition to achieve PCI-compliant AC timing.
Clock configurations change only after POR is asserted.
1
0
0
0
0
PCI_CFG[0]
Frequency
Table 14. Clock Configuration Modes
Table 15. MPC8265 and MPC8266 Clocking Modes
Input Clock
Pins
66 MHz
66 MHz
66 MHz
66 MHz
0
0
1
1
2,3
PCI_MODCK
NOTE: Tval (Output Hold)
CPM Multiplication
NOTE: PCI_MODCK
0
1
0
1
Factor
3.5
3.5
3.5
3.5
NOTE
2
Clocking Mode
PCI agent
Local bus
PCI host
Frequency
233 MHz
233 MHz
233 MHz
233 MHz
CPM
1
(continued)
Table 14
2
Core Multiplication
are applicable.
Frequency Range
Factor
3.5
4.5
PCI Clock
3
4
(MHZ)
50–66
25–50
50–66
25–50
2
Freescale Semiconductor
Frequency
200 MHz
233 MHz
266 MHz
300 MHz
Core
2

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