XS1-L01A-TQ128-C4-THS XMOS, XS1-L01A-TQ128-C4-THS Datasheet - Page 18

• Manufacturer Part Number: XS1-L01A-TQ128-C4-THS
• Description: IC MPU 32BIT SINGLE CORE 128TQFP
• Manufacturer: XMOS

Specifications of XS1-L01A-TQ128-C4-THS

• Processor Type: XCore 32-Bit
• Speed: 400MHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 128-TQFP Exposed Pad, 128-eTQFP, 128-HTQFP, 128-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Other names: 880-1023

XS1-L1 128TQFP Datasheet (2.2)
4.8 Port Timing
4.8.1 XCore I/O AC Characteristics
The Input Valid window parameter relates to the capability of the XS1-L1 family
This parameter can be calculated as the sum of the input setup time and input hold
with respect to the incoming data.
4.9 Link Interface Performance
The asynchronous nature of links means that the relative phasing of CLK clocks is
devices to capture data input to the chip with respect to an external clock source.
time with regard to the external clock as measured at the L1 device pins. The output
invalid window specifies the time for which an output will be invalid with respect to
the external clock. Note that these parameters are specified as a window rather than
absolute numbers since the L1 provides functionality to delay the incoming clock
For further details on these parameters and on interfacing to higher speed syn-
chronous interfaces see
Notes:
Symbol
T(XOINVALID)
T(XOVALID)
T(XIFMAX)
Symbol
B(2blink)
B(5blink)
1. Assumes 32 Byte packet, 7.5ns symbol time.
Parameter
2b link bandwidth
5b link bandwidth
Parameter
XCore I/O Minimum Out-
put Data Invalid window
which can be achieved
using Port/ClkBlk com-
bination
XCore I/O Minimum In-
put Data Valid window
to allow safe acquisition
of data using Port/Clk-
Blk combination
Maximum XCore I/O
toggle frequency which
can be safely acquired
and used as a clock
source using a ClkBlk
XS1 Port I/O Timing Application
MIN
9
8
MIN
TYP
TYP
MAX
60
MAX
95
244
Note.
UNITS
ns
ns
MHz
UNITS
Mbit/s
Mbit/s
Notes
Notes
1
1
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