MPC885VR133 Freescale Semiconductor, MPC885VR133 Datasheet - Page 5

IC MPU POWERQUICC 133MHZ 357PBGA

MPC885VR133

Manufacturer Part Number
MPC885VR133
Description
IC MPU POWERQUICC 133MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC Ir
Datasheet

Specifications of MPC885VR133

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
133MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC8xx
Core
MPC8xx
Data Bus Width
32 bit
Maximum Clock Frequency
133 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 95 C
Mounting Style
SMD/SMT
Data Ram Size
8 KB
I/o Voltage
5 V
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
0 C
Program Memory Size
8 KB
Program Memory Type
EPROM/Flash
Core Size
32 Bit
Cpu Speed
133MHz
Embedded Interface Type
I2C, JTAG, SPI, UART
Digital Ic Case Style
BGA
No. Of Pins
357
Rohs Compliant
Yes
For Use With
CWH-PPC-885XN-VX - BOARD EVAL QUICCSTART MPC885CWH-PPC-885XN-VE - BOARD EVAL QUICCSTART MPC885
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Freescale Semiconductor
On-chip 16
— One operation per clock (two-clock latency, one-clock blockage)
— MAC operates concurrently with other instructions
— FIR loop—Four clocks per four multiplies
Four baud rate generators
— Independent (can be connected to any SCC or SMC)
— Allow changes during operation
— Autobaud support option
Up to three serial communication controllers (SCCs) supporting the following protocols:
— Serial ATM capability on SCCs
— Optional UTOPIA port on SCC4
— Ethernet/IEEE Std 802.3™ optional on the SCC(s) supporting full 10-Mbps operation
— HDLC/SDLC
— HDLC bus (implements an HDLC-based local area network (LAN))
— Asynchronous HDLC to support point-to-point protocol (PPP)
— AppleTalk
— Universal asynchronous receiver transmitter (UART)
— Synchronous UART
— Serial infrared (IrDA)
— Binary synchronous communication (BISYNC)
— Totally transparent (bit streams)
— Totally transparent (frame based with optional cyclic redundancy check (CRC))
Up to two serial management channels (SMCs) supporting the following protocols:
— UART (low-speed operation)
— Transparent
— General circuit interface (GCI) controller
— Provide management for BRI devices as GCI controller in time-division multiplexed (TDM)
Universal serial bus (USB)—Supports operation as a USB function endpoint, a USB host
controller, or both for testing purposes (loop-back diagnostics)
— USB 2.0 full-/low-speed compatible
— The USB function mode has the following features:
channels
– Four independent endpoints support control, bulk, interrupt, and isochronous data transfers.
– CRC16 generation and checking
– CRC5 checking
– NRZI encoding/decoding with bit stuffing
– 12- or 1.5-Mbps data rate
×
16 multiply accumulate controller (MAC)
MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7
Features
5

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