MPC885VR133 Freescale Semiconductor, MPC885VR133 Datasheet - Page 6

IC MPU POWERQUICC 133MHZ 357PBGA

MPC885VR133

Manufacturer Part Number
MPC885VR133
Description
IC MPU POWERQUICC 133MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC Ir
Datasheet

Specifications of MPC885VR133

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
133MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC8xx
Core
MPC8xx
Data Bus Width
32 bit
Maximum Clock Frequency
133 MHz
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 95 C
Mounting Style
SMD/SMT
Data Ram Size
8 KB
I/o Voltage
5 V
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
0 C
Program Memory Size
8 KB
Program Memory Type
EPROM/Flash
Core Size
32 Bit
Cpu Speed
133MHz
Embedded Interface Type
I2C, JTAG, SPI, UART
Digital Ic Case Style
BGA
No. Of Pins
357
Rohs Compliant
Yes
For Use With
CWH-PPC-885XN-VX - BOARD EVAL QUICCSTART MPC885CWH-PPC-885XN-VE - BOARD EVAL QUICCSTART MPC885
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Features
6
— The USB host controller has the following features:
Serial peripheral interface (SPI)
— Supports master and slave modes
— Supports multiple-master operation on the same bus
Inter-integrated circuit (I
— Supports master and slave modes
— Supports a multiple-master environment
Time-slot assigner (TSA)
— Allows SCCs and SMCs to run in multiplexed and/or non-multiplexed operation
— Supports T1, CEPT, PCM highway, ISDN basic rate, ISDN primary rate, user defined
— 1- or 8-bit resolution
— Allows independent transmit and receive routing, frame synchronization, and clocking
— Allows dynamic changes
— Can be internally connected to four serial channels (two SCCs and two SMCs)
Parallel interface port (PIP)
— Centronics interface support
— Supports fast connection between compatible ports on MPC885/MPC880 and other MPC8xx
PCMCIA interface
— Master (socket) interface, release 2.1-compliant
— Supports two independent PCMCIA sockets
— 8 memory or I/O windows supported
Debug interface
— Eight comparators: four operate on instruction address, two operate on data address, and two
— Supports conditions: = ≠ < >
— Each watchpoint can generate a break point internally.
Normal high and normal low power modes to conserve power
– Flexible data buffers with multiple buffers per frame
– Automatic retransmission upon transmit error
– Supports control, bulk, interrupt, and isochronous data transfers
– CRC16 generation and checking
– NRZI encoding/decoding with bit stuffing
– Supports both 12- and 1.5-Mbps data rates (automatic generation of preamble token and
– Flexible data buffers with multiple buffers per frame
– Supports local loop back mode for diagnostics (12 Mbps only)
devices
operate on data
data rate configuration). Note that low-speed operation requires an external hub.
MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7
2
C) port
Freescale Semiconductor

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