MPC860DPZQ80D4 Freescale Semiconductor, MPC860DPZQ80D4 Datasheet - Page 33

IC MPU POWERQUICC 80MHZ 357PBGA

MPC860DPZQ80D4

Manufacturer Part Number
MPC860DPZQ80D4
Description
IC MPU POWERQUICC 80MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC860DPZQ80D4

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
80MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Features
-

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Table 8
1
Figure 23
Figure 24
Freescale Semiconductor
Num
The timings I39 and I40 describe the testing conditions under which the IRQ lines are tested when being defined as
level-sensitive. The IRQ lines are synchronized internally and do not have to be asserted or negated with reference to the
CLKOUT.
The timings I41, I42, and I43 are specified to allow the correct function of the IRQ lines detection circuitry and have no direct
relation with the total system interrupt latency that the MPC860 is able to support.
I39
I40
I41
I42
I43
provides interrupt timing for the MPC860.
IRQx valid to CLKOUT rising edge (setup time)
IRQx hold time after CLKOUT
IRQx pulse width low
IRQx pulse width high
IRQx edge-to-edge time
CLKOUT
provides the interrupt detection timing for the external level-sensitive lines.
provides the interrupt detection timing for the external edge-sensitive lines.
CLKOUT
IRQx
IRQx
Figure 23. Interrupt Detection Timing for External Level Sensitive Lines
Figure 24. Interrupt Detection Timing for External Edge Sensitive Lines
MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8
Characteristic
Table 8. Interrupt Timing
1
I39
I43
I41
I40
I43
4 × T
CLOCKOUT
2.00
3.00
3.00
6.00
Min
I42
All Frequencies
Max
Bus Signal Timing
Unit
ns
ns
ns
ns
33

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