MPC8260AZUMHBB Freescale Semiconductor, MPC8260AZUMHBB Datasheet - Page 2

IC MPU POWERQUICC II 480-TBGA

MPC8260AZUMHBB

Manufacturer Part Number
MPC8260AZUMHBB
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8260AZUMHBB

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
266MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
266 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
No
Rohs Compliant
No
For Use With
MPC8260ADS-TCOM - BOARD DEV ADS POWERQUICC II
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Features
Figure 1
functionality that is not available on all devices; refer to the notes.
1
The major features of the MPC826xA family are as follows:
2
MCC1
Parallel I/O
Generators
Baud Rate
MPC8260A PowerQUICC™ II Integrated Communications Processor Hardware Specifications, Rev. 2.0
Features
Dual-issue integer core
— A core version of the EC603e microprocessor
— System core microprocessor supporting frequencies of 150–300 MHz
— Separate 16-Kbyte data and instruction caches:
Notes:
1
2
3
Timers
4
shows the block diagram for the MPC8266, the HiP4 superset device. Shaded portions indicate
MPC8264
MPC8265
MPC8266
MCC2
– Four-way set associative
– Physically addressed
– LRU replacement algorithm
G2 Core
Communication Processor Module (CPM)
FCC1
TC Layer Hardware
8 TDM Ports
Interrupt
Controller
32-bit RISC Microcontroller
FCC2
and Program ROM
FCC3
4
5
6
5
Not on MPC8255
4 TDM ports on the MPC8255
2 MII ports on the MPC8255
1,3
16 Kbytes
16 Kbytes
4
D-Cache
I-Cache
D-MMU
I-MMU
Dual-Port RAM
SCC1
32 Kbytes
Figure 1. MPC8266 Block Diagram
Microcode
IMA
SCC2
1,3
SCC3
Time Slot Assigner
Ports
3 MII
Serial Interface
4 Virtual
DMAs
Serial
IDMAs
6
SCC4
SMC1
2 UTOPIA
Ports
System Interface Unit
SMC2
Memory Controller
Bus Interface Unit
System Functions
Clock Counter
60x-to-Local
60x-to-PCI
Bridge
Bridge
(SIU)
Non-Multiplexed
SPI
2,3
I/O
I
2
C
Freescale Semiconductor
32 bits, up to 66 MHz
32 bits, up to 83 MHz
60x Bus
PCI Bus
Local Bus
or
2,3

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