Z0847006PSG Zilog, Z0847006PSG Datasheet - Page 302
![IC 6MHZ Z80 NMOS DART 40-DIP](/photos/6/57/65796/269-40-dip_sml.jpg)
Z0847006PSG
Manufacturer Part Number
Z0847006PSG
Description
IC 6MHZ Z80 NMOS DART 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheet
1.Z0847006PSG.pdf
(330 pages)
Specifications of Z0847006PSG
Processor Type
Z80
Features
Dual Channel Asynchronous Receiver/Transmitter (DART)
Speed
6MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Mounting Style
Through Hole
Cpu Speed
6MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
847006
Rohs Compliant
Yes
Clock Frequency
6MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z0847006PSG
Manufacturer:
Zilog
Quantity:
22
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282
UM008101-0601
< % 2 7 2 G T K R J G T C N U
7 U G T / C P W C N
Figure 116. Write Register 2
Write Register 3
WR3
(Table 20)
Table 20. Write Register 3 Logic Control
Receiver Enable (D0)
A 1 programmed into this bit allows receive operations to begin. Set this bit
only after all other receive parameters are set and the receiver is completely
initialized.
D7
Receiver CRC
Receiver Bits/
(Figure
Enable
D6
Chars
D7
D3
D5
117) contains receiver logic control bits and parameters.
D4
Receiver Bits/Char
Address Search
D3
Mode
D6
D2
D2
0
D1
D0
Sync Char Load
Auto Enables
Inhibit
D5
D1
V0
V1
V2
V3
V4
V5
V6
V7
Interrupt
Vector
Serial Input/Output
Enter Hunt Phase
Receiver Enable
D4
D0
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