EZ80L92AZ050EG Zilog, EZ80L92AZ050EG Datasheet - Page 131
EZ80L92AZ050EG
Manufacturer Part Number
EZ80L92AZ050EG
Description
IC WEBSERVER 50MHZ 100LQFP
Manufacturer
Zilog
Datasheet
1.EZ80L92AZ020SG.pdf
(231 pages)
Specifications of EZ80L92AZ050EG
Processor Type
eZ80
Features
High Speed, Single-Cycle Instruction-Fetch
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Processor Series
EZ80L92x
Core
eZ80
Data Bus Width
8 bit
Program Memory Size
64 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80L920210ZCO
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3877
EZ80L92AZ050EG
EZ80L92AZ050EG
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PS013014-0107
UART_RxD
Baud Rate
IR_RxD
8-clock
delay
Jitter
Infrared Encoder/Decoder Signal Pins
Clock
output following a 7-clock High (1) period. Following the 3-clock Low pulse, is a 6-clock
High pulse to complete the full 16-clock data period. Data transmission is illustrated in
Figure
Due to the inherent sampling of the received IR_RXD signal by the BIt Rate Clock, some
jitter can be expected on the first bit in any sequence of data. However, all subsequent bits
in the received data stream are a fixed 16-clock periods wide.
The infrared encoder/decoder signal pins (IR_TXD and IR_RXD) are multiplexed with
General-Purpose I/O (GPIO) pins. These GPIO pins must be configured for alternate func-
tion operation for the infrared encoder/decoder to operate.
The remaining six UART0 pins (CTS0, DCD0, DSR0, DTR0, RTS0 and RI0) are not
required for use with the infrared encoder/decoder. The UART0 modem status interrupt
should be disabled to prevent unwanted interrupts from these pins. The GPIO pins corre-
sponding to these six unused UART0 pins can be used for inputs, outputs, or interrupt
sources. Recommended GPIO Port D control register settings are listed in
additional information on setting the GPIO Port modes, see
on page 38
Start Bit = 0
16-clock
26.
period
1.6 s
min. pulse
16-clock
period
Figure 26. Infrared Data Reception
Data Bit 0 = 1
16-clock
period
Data Bit 1 = 0
16-clock
period
Data Bit 2 = 1
General-Purpose Input/Output
16-clock
period
Product Specification
Infrared Encoder/Decoder
Data Bit 3 = 1
Table
66. For
125
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