MPC855TZQ80D4 Freescale Semiconductor, MPC855TZQ80D4 Datasheet - Page 80

• Manufacturer Part Number: MPC855TZQ80D4
• Description: IC MPU POWERQUICC 80MHZ 357PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICCr

Specifications of MPC855TZQ80D4

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 80MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Processor Series: MPC8xx
• Core: MPC8xx
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 80 MHz
• Operating Supply Voltage: 2.5 V, 3.3 V
• Maximum Operating Temperature: + 95 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Core Size: 32 Bit
• Program Memory Size: 8KB
• Cpu Speed: 80MHz
• Digital Ic Case Style: BGA
• No. Of Pins: 357
• Supply Voltage Range: 3.135V To 3.465V
• Rohs Compliant: No
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

System Design Information
When data is held high, SW1 is closed (SW2 is open) and R
OV
other in value. Then, Z
The value of this resistance and the strength of the driver’s current source can be found by making two
measurements. First, the output voltage is measured while driving logic 1 without an external differential
termination resistor. The measured voltage is V
while driving logic 1 with an external precision differential termination resistor of value R
measured voltage is V
× (V
Table 50
nominal OV
80
Impedance
Note: Nominal supply voltages. See
Differential
DD
R
R
1
N
P
/V
/2. R
MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
2
summarizes the signal impedance targets. The driver impedance are targeted at minimum V
– 1). The drive current is then I
P
DD
then becomes the resistance of the pull-up devices. R
Local Bus, Ethernet, DUART, Control, Configuration, Power
, 105°C.
2
0
= 1/(1/R
= (R
P
+ R
Table
Figure 51. Driver Impedance Measurement
1
Data
+ 1/R
N
Table 50. Impedance Characteristics
Management
)/2.
1, T
43 Target
43 Target
2
j
NA
)) × I
= 105°C.
source
source
1
= V
= R
. Solving for the output impedance gives R
1
source
/R
source
× I
Pad
P
.
R
source
R
is trimmed until the voltage at the pad equals
OV
OGND
N
P
DD
P
. Second, the output voltage is measured
and R
SW2
SW1
N
25 Target
25 Target
are designed to be close to each
PCI
NA
DDR DRAM Symbol Unit
20 Target
20 Target
Freescale Semiconductor
NA
term
source
Z
. The
DIFF
Z
Z
0
0
= R
DD
term
Ω
Ω
Ω
,