MPC5200BV400 Freescale Semiconductor, MPC5200BV400 Datasheet - Page 11

no-image

MPC5200BV400

Manufacturer Part Number
MPC5200BV400
Description
IC MPU 32BIT 400MHZ 272-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC5200BV400

Processor Type
MPC52xx PowerPC 32-Bit
Speed
400MHz
Voltage
1.5V
Mounting Type
Surface Mount
Package / Case
272-PBGA
Family Name
MPC52xx
Device Core
PowerPC
Device Core Size
32b
Frequency (max)
400MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.5V
Operating Supply Voltage (max)
1.58V
Operating Supply Voltage (min)
1.42V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
272
Package Type
BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC5200BV400
Manufacturer:
VTI
Quantity:
2 397
Part Number:
MPC5200BV400
Manufacturer:
FREESCAL
Quantity:
526
Part Number:
MPC5200BV400
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1.2.1
1.2.2
1.2.3
1.2.4
The internal clocking of the e300 core is generated from and synchronized to the system clock by means of a voltage-controlled
core PLL.
Freescale Semiconductor
1
2
3
The SYS_XTAL frequency and PLL Configuration bits must be chosen such that the resulting system frequency, CPU
(core) frequency, and PLL (VCO) frequency do not exceed their respective maximum or minimum operating
frequencies.
This represents total input jitter—short term and long term combined—and is guaranteed by design. Two different
types of jitter can exist on the input to CORE_SYSCLK, systemic and true random jitter. True random jitter is rejected.
Systemic jitter is passed into and through the PLL to the internal clock circuitry.
Relock time is guaranteed by design and characterization. PLL-relock time is the maximum amount of time required
for the PLL lock after a stable VDD and CORE_SYSCLKare reached during the power-on reset sequence. This
specification also applies when the PLL has been disabled and subsequently re-enabled during sleep modes.
SYS_XTAL clock input jitter
System VCO frequency
System PLL relock time
Oscillator start-up time
SYS_XTAL frequency
RTC_XTAL frequency
SYS_XTAL frequency
SYS_XTAL cycle time
System Oscillator Electrical Characteristics
RTC Oscillator Electrical Characteristics
System PLL Electrical Characteristics
e300 Core PLL Electrical Characteristics
Characteristic
Characteristic
Characteristic
Table 8. System Oscillator Electrical Characteristics
Table 9. RTC Oscillator Electrical Characteristics
Table 10. System PLL Specifications
f
f
f
t
t
f
sys_xtal
sys_xtal
sys_xtal
VCOsys
up_osc
rtc_xtal
Sym
Sym
Sym
t
t
jitter
lock
MPC5200B Data Sheet, Rev. 4
Notes
Notes
Notes
(1)
(2)
(1)
(3)
(1)
15.6
15.6
66.6
Min
Min
Min
250
Typical
Typical
Typical
32.768
33.3
33.3
30.0
533
Max
35.0
Max
Max
35.0
28.5
150
800
100
10
MHz
MHz
MHz
Unit
Unit
Unit
kHz
ms
ns
ps
μs
SpecID
SpecID
SpecID
O1.1
O1.2
O2.1
O3.1
O3.2
O3.3
O3.4
O3.5
11

Related parts for MPC5200BV400