MPC8245ARZU400D Freescale Semiconductor, MPC8245ARZU400D Datasheet - Page 4

IC MPU 32BIT 400MHZ 352-TBGA

MPC8245ARZU400D

Manufacturer Part Number
MPC8245ARZU400D
Description
IC MPU 32BIT 400MHZ 352-TBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8245ARZU400D

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
400MHz
Voltage
2.1V
Mounting Type
Surface Mount
Package / Case
352-TBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
2 V, 2.1 V, 3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Electrical and Thermal Characteristics
4.3.1 Clock AC Specifications
Figure 7
29 angstrom parts. These graphs define the areas of DLL locking for various modes. The gray areas show
where the DLL will lock.
4
Typ—OV
Typ—GV
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Power consumption of PLL supply pins (AV
The values include V
Maximum—FP power is measured at V
cache-resident, looping, floating point multiplication instruction.
Maximum—INT power is measured at V
cache-resident, looping, integer instructions.
Power saving mode maximums are measured at V
Typical power is measured at V
value where there is a continuous flush of cache lines with alternating ones and zeros on 64-bit boundaries to local memory
are averaged.
Power saving mode data measured with only two PCI_CLKs and two SDRAM_CLKs enabled.
The typical minimum I/O power values was the result of the MPC8245 performing cache resident integer operations at the
slowest frequency combination of 33:66:200 (PCI:Mem:CPU) MHz.
The typical maximum OV
(PCI:Mem:CPU) MHz for the 400-MHz part, and performing continuous flushes of cache lines with alternating ones and
zeros to PCI memory.
The typical maximum GV
66:133:399 (PCI:Mem:CPU) MHz for the 400-MHz part, and performing continuous flushes of cache lines with alternating
ones and zeros on 64-bit boundaries to local memory.
DD
DD
through
MPC8245 Hardware Specifications Addendum for the MPC8245ARXXnnnx Series, Rev. 3
Figure 10
DD
, AV
DD
DD
DD
value resulted from the MPC8245 operating at the fastest frequency combination of 66:133:399
show the DLL locking range loop delay vs. frequency of operation for
value resulted from the MPC8245 operating at the fastest frequency combination of
, and AV
Mode
Mode
DD
Table 5. Power Consumption (continued)
= AV
DD
DD
DD
DD
2, but do not include I/O supply power.
= 2.1 V with dynamic power management enabled while running an entirely
= 2.1 V, OV
DD
= 2.1 V with dynamic power management enabled while running entirely
and AV
I/O Power Supplies
DD
DD
= 2.1 V while the device is in doze, nap, or sleep mode.
DD
2) < 15 mW that the design guarantees but were not tested.
= 3.3 V where a nominal FP value, a nominal INT value, and a
10
PCI Bus Clock/Memory
CPU Clock Frequency
66/133/399
Bus Clock
140–360
340–920
Range
(MHz)
Freescale Semiconductor
Unit
Unit
mW
mW
Notes
Notes
7, 8
7, 9

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